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authorMarek Vasut <[email protected]>2024-12-21 22:46:36 +0100
committerMarek Vasut <[email protected]>2024-12-29 16:55:31 +0100
commit6a32d5b54f86abc4b1129a5ddf0125a7a75cd383 (patch)
tree08537601b6794e2bbee2ba0e501f50989f711c7c
parentcf096e7d73eaf36dbdd1e24339c1676b262dc661 (diff)
arm64: renesas: Make bottom 128 MiB of DRAM available in EL3
In case U-Boot runs in EL3, which is the highest privilege level on ARM64, there can be no firmware running that would restrict access to the bottom 128 MiB of DRAM. In fact, it is likely that U-Boot would have to load that firmware into those bottom 128 MiB of DRAM and start that firmware. Make those bottom 128 MiB of DRAM available in case U-Boot runs in EL3 to allow loading the firmware to that area. Signed-off-by: Marek Vasut <[email protected]>
-rw-r--r--board/renesas/rcar-common/common.c32
1 files changed, 31 insertions, 1 deletions
diff --git a/board/renesas/rcar-common/common.c b/board/renesas/rcar-common/common.c
index 4e35e0151c9..90eb468e4c4 100644
--- a/board/renesas/rcar-common/common.c
+++ b/board/renesas/rcar-common/common.c
@@ -15,6 +15,7 @@
#include <asm/io.h>
#include <dm/uclass-internal.h>
#include <asm/arch/renesas.h>
+#include <asm/system.h>
#include <linux/libfdt.h>
#ifdef CONFIG_RCAR_64
@@ -23,13 +24,42 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
- return fdtdec_setup_mem_size_base();
+ int ret = fdtdec_setup_mem_size_base();
+
+ if (current_el() == 3 && gd->ram_base == 0x48000000) {
+ /*
+ * If this U-Boot runs in EL3, make the bottom 128 MiB
+ * available for loading of follow up firmware blobs.
+ */
+ gd->ram_base -= 0x8000000;
+ gd->ram_size += 0x8000000;
+ }
+
+ return ret;
}
int dram_init_banksize(void)
{
+ int bank;
+
fdtdec_setup_memory_banksize();
+ if (current_el() != 3)
+ return 0;
+
+ for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+ if (gd->bd->bi_dram[bank].start != 0x48000000)
+ continue;
+
+ /*
+ * If this U-Boot runs in EL3, make the bottom 128 MiB
+ * available for loading of follow up firmware blobs.
+ */
+ gd->bd->bi_dram[bank].start -= 0x8000000;
+ gd->bd->bi_dram[bank].size += 0x8000000;
+ break;
+ }
+
return 0;
}