diff options
| author | Michal Simek <[email protected]> | 2022-11-29 13:23:20 +0100 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2022-12-05 08:55:55 +0100 |
| commit | 6a664a7bd40261c38874beac264a1fb5b4ae1a5d (patch) | |
| tree | a164b84d66246951adb0e0cf5b7a6c3cb6ab75bc | |
| parent | 92e690053630f8884133305a66ab03ea1a09bf5c (diff) | |
ARM: zynq: Add missing twd timer for mini configurations
The commit b7e0750d8872 ("zynq: Convert arm twd timer to DM driver")
switched timer to DM but missing to add nodes to all mini configurations.
Based on it missing timer end up in non functional system where any delay
doesn't work.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/2020fc7e3d4760e890265485b3c7e18eb1caf8be.1669724598.git.michal.simek@amd.com
| -rw-r--r-- | arch/arm/dts/zynq-cse-nand.dts | 7 | ||||
| -rw-r--r-- | arch/arm/dts/zynq-cse-nor.dts | 7 | ||||
| -rw-r--r-- | arch/arm/dts/zynq-cse-qspi.dtsi | 7 |
3 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts index 32cb3bffcb9..27adfb92162 100644 --- a/arch/arm/dts/zynq-cse-nand.dts +++ b/arch/arm/dts/zynq-cse-nand.dts @@ -86,6 +86,13 @@ reg = <0x100 0x100>; }; }; + + scutimer: timer@f8f00600 { + u-boot,dm-pre-reloc; + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xf8f00600 0x20>; + clock-frequency = <333333333>; + }; }; }; diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts index 197fbd717aa..f22a149f792 100644 --- a/arch/arm/dts/zynq-cse-nor.dts +++ b/arch/arm/dts/zynq-cse-nor.dts @@ -85,6 +85,13 @@ #address-cells = <1>; #size-cells = <1>; }; + + scutimer: timer@f8f00600 { + u-boot,dm-pre-reloc; + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xf8f00600 0x20>; + clock-frequency = <333333333>; + }; }; }; diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi index 38410eeca88..f7ac92b8026 100644 --- a/arch/arm/dts/zynq-cse-qspi.dtsi +++ b/arch/arm/dts/zynq-cse-qspi.dtsi @@ -116,6 +116,13 @@ reg = <0x100 0x100>; }; }; + + scutimer: timer@f8f00600 { + u-boot,dm-pre-reloc; + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xf8f00600 0x20>; + clock-frequency = <333333333>; + }; }; }; |