diff options
| author | Patrice Chotard <[email protected]> | 2025-01-09 11:21:47 +0100 |
|---|---|---|
| committer | Patrice Chotard <[email protected]> | 2025-01-31 10:13:10 +0100 |
| commit | 6b20aed7cfd88bdef3618a9548183c59091b1b69 (patch) | |
| tree | b517cd261390626d0d537d458470549fbd59d303 | |
| parent | 2a903b0141b99bb41756d01a0a1a5463e2c4f365 (diff) | |
stm32mp: Fix board_get_usable_ram_top()
mmu_set_region_dcache_behaviour() parameters must be aligned
which is not always the case.
For example for STM32MP2, we stayed stuck inside
mmu_set_region_dcache_behaviour() in an infinite loop because
set_one_region() always return 0 due to start parameter which is
not aligned.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
| -rw-r--r-- | arch/arm/mach-stm32mp/dram_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c index b06105768b3..34b958d7afd 100644 --- a/arch/arm/mach-stm32mp/dram_init.c +++ b/arch/arm/mach-stm32mp/dram_init.c @@ -81,7 +81,7 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) /* add 8M for U-Boot reserved memory: display, fdt, gd,... */ size = ALIGN(SZ_8M + CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE); - reg = gd->ram_top - size; + reg = ALIGN(gd->ram_top - size, MMU_SECTION_SIZE); /* Reserved memory for OP-TEE at END of DDR for STM32MP1 SoC */ if (IS_ENABLED(CONFIG_STM32MP13X) || IS_ENABLED(CONFIG_STM32MP15X)) { |