clk: px30: Allow use of GPU and WIFI_PMU in assigned-clocks

Add dummy implementation of set_rate for SCLK_GPU and SCLK_WIFI_PMU to
allow use of dts/upstream assigned-clocks in cru and pmucru nodes.

Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index ad7e1c0f246..b5054e84c32 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1360,6 +1360,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_GMAC_RMII:
 		ret = px30_mac_set_speed_clk(priv, rate);
 		break;
+	/* Might occur in cru assigned-clocks, can be ignored here */
+	case SCLK_GPU:
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -1726,6 +1729,9 @@ static ulong px30_pmuclk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_UART0_PMU:
 		ret = px30_pmu_uart0_set_clk(priv, rate);
 		break;
+	/* Might occur in pmucru assigned-clocks, can be ignored here */
+	case SCLK_WIFI_PMU:
+		break;
 	default:
 		return -ENOENT;
 	}