diff options
| author | Jernej Skrabec <[email protected]> | 2023-04-10 10:21:10 +0200 |
|---|---|---|
| committer | Andre Przywara <[email protected]> | 2023-04-12 00:17:21 +0100 |
| commit | 7230bebfe3b9a7ce97ac3b3aef2d26ded08b6224 (patch) | |
| tree | c15beaeae63fa80f07512a6d979486a13719851d | |
| parent | f0500692972ad6981d0a669e02707044dc224483 (diff) | |
sunxi: Fix write to H616 DRAM CR register
Vendor DRAM code actually writes to whole CR register and not just sets
bit 31 in mctl_ctrl_init().
Just to be safe, do that here too.
Acked-by: Andre Przywara <[email protected]>
Signed-off-by: Jernej Skrabec <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
| -rw-r--r-- | arch/arm/mach-sunxi/dram_sun50i_h616.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c index 454c845a001..039e7622436 100644 --- a/arch/arm/mach-sunxi/dram_sun50i_h616.c +++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c @@ -873,7 +873,7 @@ static bool mctl_ctrl_init(struct dram_para *para) writel(0x06000400, &mctl_ctl->unk_0x3240); writel(0x06000400, &mctl_ctl->unk_0x4240); - setbits_le32(&mctl_com->cr, BIT(31)); + writel(BIT(31), &mctl_com->cr); mctl_set_addrmap(para); |