diff options
| author | Quanyang Wang <[email protected]> | 2025-09-02 10:53:23 +0200 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2025-10-09 09:07:04 +0200 |
| commit | 733f2de3324b6344f7b96433376fd2dea8fc23e9 (patch) | |
| tree | 3e3fd52f70390e9423de28bcfa19734c32af5cb9 | |
| parent | fe8d071c49845c6ad1a387762f048ef158326580 (diff) | |
arm64: zynqmp: Disable coresight by default
When secure-boot mode of bootloader is enabled, the registers of
coresight are not permitted to access that's why disable it by default.
Signed-off-by: Quanyang Wang <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/1ea8e5bdb9bfdcc1fc6670bf4b4e13c40fbdc00c.1756803198.git.michal.simek@amd.com
| -rw-r--r-- | arch/arm/dts/zynqmp.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 0e0436ecce8..9f3404ee8b4 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -547,6 +547,7 @@ reg = <0x0 0xfec10000 0x0 0x1000>; clock-names = "apb_pclk"; cpu = <&cpu0>; + status = "disabled"; }; cpu1_debug: debug@fed10000 { @@ -554,6 +555,7 @@ reg = <0x0 0xfed10000 0x0 0x1000>; clock-names = "apb_pclk"; cpu = <&cpu1>; + status = "disabled"; }; cpu2_debug: debug@fee10000 { @@ -561,6 +563,7 @@ reg = <0x0 0xfee10000 0x0 0x1000>; clock-names = "apb_pclk"; cpu = <&cpu2>; + status = "disabled"; }; cpu3_debug: debug@fef10000 { @@ -568,6 +571,7 @@ reg = <0x0 0xfef10000 0x0 0x1000>; clock-names = "apb_pclk"; cpu = <&cpu3>; + status = "disabled"; }; /* GDMA */ |