diff options
| author | Marek Vasut <[email protected]> | 2024-07-19 12:48:40 +0200 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2024-07-22 10:51:46 -0600 |
| commit | 7413246e4c8d86b0b8c51a8ff0a8bd1992e74dcc (patch) | |
| tree | e96f61e579689e8c9d24c5c9941b4a900cd4ce6c | |
| parent | 63b191241a730efa977ea1099318038eae13bb75 (diff) | |
board: altera: Remove duplicate newlines
Drop all duplicate newlines. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
| -rw-r--r-- | board/altera/arria5-socdk/qts/iocsr_config.h | 1 | ||||
| -rw-r--r-- | board/altera/arria5-socdk/qts/pll_config.h | 1 | ||||
| -rw-r--r-- | board/altera/cyclone5-socdk/qts/iocsr_config.h | 1 | ||||
| -rw-r--r-- | board/altera/cyclone5-socdk/qts/pll_config.h | 1 |
4 files changed, 0 insertions, 4 deletions
diff --git a/board/altera/arria5-socdk/qts/iocsr_config.h b/board/altera/arria5-socdk/qts/iocsr_config.h index f201ad34587..9bd3e1b5abf 100644 --- a/board/altera/arria5-socdk/qts/iocsr_config.h +++ b/board/altera/arria5-socdk/qts/iocsr_config.h @@ -691,5 +691,4 @@ const unsigned long iocsr_scan_chain3_table[] = { 0x00004100, }; - #endif /* __SOCFPGA_IOCSR_CONFIG_H__ */ diff --git a/board/altera/arria5-socdk/qts/pll_config.h b/board/altera/arria5-socdk/qts/pll_config.h index 7fe290b28d9..902caf450d3 100644 --- a/board/altera/arria5-socdk/qts/pll_config.h +++ b/board/altera/arria5-socdk/qts/pll_config.h @@ -80,5 +80,4 @@ #define CFG_HPS_ALTERAGRP_MAINCLK 2 #define CFG_HPS_ALTERAGRP_DBGATCLK 3 - #endif /* __SOCFPGA_PLL_CONFIG_H__ */ diff --git a/board/altera/cyclone5-socdk/qts/iocsr_config.h b/board/altera/cyclone5-socdk/qts/iocsr_config.h index a571fb3e509..6df8cdb12dd 100644 --- a/board/altera/cyclone5-socdk/qts/iocsr_config.h +++ b/board/altera/cyclone5-socdk/qts/iocsr_config.h @@ -655,5 +655,4 @@ const unsigned long iocsr_scan_chain3_table[] = { 0x00004100, }; - #endif /* __SOCFPGA_IOCSR_CONFIG_H__ */ diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h b/board/altera/cyclone5-socdk/qts/pll_config.h index a46d124e9e9..59a9dcfdb61 100644 --- a/board/altera/cyclone5-socdk/qts/pll_config.h +++ b/board/altera/cyclone5-socdk/qts/pll_config.h @@ -80,5 +80,4 @@ #define CFG_HPS_ALTERAGRP_MAINCLK 4 #define CFG_HPS_ALTERAGRP_DBGATCLK 4 - #endif /* __SOCFPGA_PLL_CONFIG_H__ */ |