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| author | Hrushikesh Salunke <[email protected]> | 2025-06-16 22:19:29 +0530 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-06-26 17:16:40 -0600 |
| commit | 7d70986071ea32b2d496ecfc4f9621e454dc1b75 (patch) | |
| tree | e86c0598d03f99dcde582964954a31176395e9bd | |
| parent | a4a0edc6046dd5b9ebe24ad72dfcdb43b36f0bd6 (diff) | |
configs: am64x_evm_a53_defconfig: Enable configs for PCI Endpoint mode
TI's AM64x SoC has a single instance of PCIe Controller namely PCIe0
which is a Cadence PCIe Controller. To support PCI Endpoint
functionality with the PCIe0 instance of PCIe, enable the corresponding
configs.
Signed-off-by: Hrushikesh Salunke <[email protected]>
| -rw-r--r-- | configs/am64x_evm_a53_defconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 8f7d098f770..5c3b46d710f 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -144,6 +144,8 @@ CONFIG_TI_ICSSG_PRUETH=y CONFIG_NVME_PCI=y CONFIG_PCI_CONFIG_HOST_BRIDGE=y CONFIG_PCIE_CDNS_TI=y +CONFIG_PCI_ENDPOINT=y +CONFIG_PCIE_CDNS_TI_EP=y CONFIG_PHY=y CONFIG_SPL_PHY=y CONFIG_PHY_CADENCE_TORRENT=y |