diff options
| author | Venkatesh Yadav Abbarapu <[email protected]> | 2025-07-07 10:07:38 +0530 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2025-07-08 14:58:44 +0200 |
| commit | 7d8eafcf98e3fbc6df6d423c6d35c42af67b5e93 (patch) | |
| tree | 7a25e3df822581eb8253ec968821b46e5dd1ad7e | |
| parent | f289c36f074dc24d8ed10e80180ffde4214b6be8 (diff) | |
xilinx: zynqmp: disable CONFIG_SPI_FLASH_BAR
Legacy SPI flash devices used a 24-bit (3-byte) addressing scheme,
limiting the addressable memory to 16 MB. To support larger densities
(256 Mbit and higher), extended addressing schemes, such as 32-bit
(4-byte) addressing, were introduced. If the flash density exceeds
16 MB and CONFIG_SPI_FLASH_BAR is disabled, the device will use a
4-byte addressing mode.
Signed-off-by: Prasad Kummari <[email protected]>
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
| -rw-r--r-- | configs/xilinx_zynqmp_virt_defconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index c6eae387b92..65c8a4bbaad 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -163,7 +163,6 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ARASAN=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NAND_MAX_CHIPS=2 -CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y |