diff options
| author | Grzegorz Szymaszek <[email protected]> | 2021-06-02 19:09:13 +0200 |
|---|---|---|
| committer | Patrice Chotard <[email protected]> | 2021-06-18 08:34:16 +0200 |
| commit | 7db3307848f2d4734861fda45320345e688ccdac (patch) | |
| tree | e9d3d5ecefeeb71f6c08d854aee829e70505e468 | |
| parent | 51a2ac966e2ce45ae3b6d43975977db84759ed91 (diff) | |
arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
corresponding Linux kernel device tree.
Signed-off-by: Grzegorz Szymaszek <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
| -rw-r--r-- | arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi index 583812f1375..1510a5b3644 100644 --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi @@ -274,6 +274,7 @@ bus-width = <8>; vmmc-supply = <&v3v3>; vqmmc-supply = <&vdd>; + mmc-ddr-3_3v; status = "okay"; }; |