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authorPranav Tilak <[email protected]>2026-04-10 15:00:16 +0530
committerMichal Simek <[email protected]>2026-04-23 11:49:48 +0200
commit8342f575796522395b91dbb5484a741e7a2004f2 (patch)
treee6c5485f70f87e4387e05b3587b00115dc0ae040
parentb82846dd8135c99ced4765a5be49a7c5dd214271 (diff)
net: zynq_gem: add SPEED_10000 case in clock rate selection
Add SPEED_10000 case in the speed switch with the fixed 150 MHz tx_clk rate. Without this, clk_rate stays 0 for 10000 Mbps and clk_set_rate(0) on a fixed clock aborts initialization. Signed-off-by: Pranav Tilak <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected]
-rw-r--r--drivers/net/zynq_gem.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index a50d5aee03f..c06d114af68 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -134,6 +134,7 @@
#define ZYNQ_GEM_FREQUENCY_10 2500000UL
#define ZYNQ_GEM_FREQUENCY_100 25000000UL
#define ZYNQ_GEM_FREQUENCY_1000 125000000UL
+#define ZYNQ_GEM_FREQUENCY_10000 150000000UL
#define RXCLK_EN BIT(0)
@@ -602,6 +603,9 @@ static int zynq_gem_init(struct udevice *dev)
}
switch (priv->phydev->speed) {
+ case SPEED_10000:
+ clk_rate = ZYNQ_GEM_FREQUENCY_10000;
+ break;
case SPEED_1000:
nwconfig |= ZYNQ_GEM_NWCFG_SPEED1000;
clk_rate = ZYNQ_GEM_FREQUENCY_1000;