diff options
| author | Manorit Chawdhry <[email protected]> | 2025-05-15 17:08:37 +0530 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-05-29 08:33:11 -0600 |
| commit | 8668c6a3bd1aa1da9c02ac140b7dbf7b3266ab1e (patch) | |
| tree | a934b4c6eccf15418521ae4c45eb4461b1af6220 | |
| parent | 2696d3baea5910c9fb9f93d14e2354eed05f4e15 (diff) | |
arm: dts: k3-am62a7-phycore-r5*: Remove clocks from main_timer0
The commit 79d91e77f4c2 ("clk: ti: clk-k3-pll: Add additional robustness
steps to the PLL sequence") introduced a change which requires the
main_timer0 to not rely on it's own clocks which anyways was wrong.
Fix it by removing the clock dependency for it, also while at it, move
it from u-boot.dtsi to R5 as that is the only entity that should require
it as DM isn't up.
Fixes: 5d1aac358f3c ("arm: dts: k3-*-r5: Remove clocks from mcu_timer0")
Signed-off-by: Manorit Chawdhry <[email protected]>
Acked-by: Wadim Egorov <[email protected]>
| -rw-r--r-- | arch/arm/dts/k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts | 9 |
2 files changed, 9 insertions, 5 deletions
diff --git a/arch/arm/dts/k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi b/arch/arm/dts/k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi index f922f4b4781..73255a18e9b 100644 --- a/arch/arm/dts/k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi +++ b/arch/arm/dts/k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi @@ -13,7 +13,6 @@ / { chosen { stdout-path = "serial2:115200n8"; - tick-timer = &main_timer0; }; aliases { @@ -157,10 +156,6 @@ bootph-all; }; -&main_timer0 { - bootph-all; -}; - &main_uart0 { bootph-all; }; diff --git a/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts b/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts index 0060c7a6934..63b7864a469 100644 --- a/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts +++ b/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts @@ -88,6 +88,15 @@ ti,secure-host; }; +&main_timer0 { + /delete-property/ clocks; + /delete-property/ clocks-names; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + clock-frequency = <25000000>; + bootph-pre-ram; +}; + &main_bcdma { ti,sci = <&dm_tifs>; }; |