diff options
| author | Heiko Stuebner <[email protected]> | 2024-10-28 20:00:22 +0100 |
|---|---|---|
| committer | Kever Yang <[email protected]> | 2024-11-08 17:05:35 +0800 |
| commit | 949560e61a70071b83a702f2741ca8a6b29869c5 (patch) | |
| tree | 50cb7236a27a10aa6283ffefa29d234e5f360f38 | |
| parent | 44ce50f846e0f10e1591829ffc72976e33ee5c93 (diff) | |
arm64: dts: rockchip: enable sata1+2 on Qnap-TS433
The TS433 has 4 bays. The last two are accessed via a pci-connected
sata controller, while the first two are accessed via the rk3568's
sata controllers. Enable these two now.
Tested-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ upstream commit: 673c1353b3d476b9c5df6b84a777ed171e5594f5 ]
(cherry picked from commit dfa45bbda057851d0c2167b4c311c0301637cc19)
Reviewed-by: Kever Yang <[email protected]>
| -rw-r--r-- | dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index be1c2286c2d..40af4dd0e41 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -80,6 +80,16 @@ status = "okay"; }; +/* connected to sata1 */ +&combphy1 { + status = "okay"; +}; + +/* connected to sata2 */ +&combphy2 { + status = "okay"; +}; + &gmac0 { assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; @@ -156,6 +166,14 @@ }; }; +&sata1 { + status = "okay"; +}; + +&sata2 { + status = "okay"; +}; + &sdhci { bus-width = <8>; max-frequency = <200000000>; |