diff options
| author | David Lechner <[email protected]> | 2026-07-07 14:10:09 -0500 |
|---|---|---|
| committer | David Lechner <[email protected]> | 2026-07-22 12:41:03 -0500 |
| commit | 9d111995f0e9e5d42dd4f6a1662495bc26fdd52c (patch) | |
| tree | 363fa4c9d998ce72c253b679b48e2bf05643c487 | |
| parent | bd9bf2ad5eb23b060924ddc391efb7716aa0c00e (diff) | |
clk: mediatek: mt7988: unique driver names
Change driver names for MediaTek mt7988 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.
Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-7-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <[email protected]>
| -rw-r--r-- | drivers/clk/mediatek/clk-mt7988.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/clk/mediatek/clk-mt7988.c b/drivers/clk/mediatek/clk-mt7988.c index 011dbc8e7aa..ebad78a9151 100644 --- a/drivers/clk/mediatek/clk-mt7988.c +++ b/drivers/clk/mediatek/clk-mt7988.c @@ -871,7 +871,7 @@ static int mt7988_topckgen_probe(struct udevice *dev) return mtk_common_clk_init(dev, &mt7988_topckgen_clk_tree); } -U_BOOT_DRIVER(mtk_clk_apmixedsys) = { +U_BOOT_DRIVER(mt7988_clk_apmixedsys) = { .name = "mt7988-clock-fixed-pll", .id = UCLASS_CLK, .of_match = mt7988_fixed_pll_compat, @@ -882,7 +882,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = { .flags = DM_FLAG_PRE_RELOC, }; -U_BOOT_DRIVER(mtk_clk_topckgen) = { +U_BOOT_DRIVER(mt7988_clk_topckgen) = { .name = "mt7988-clock-topckgen", .id = UCLASS_CLK, .of_match = mt7988_topckgen_compat, @@ -903,7 +903,7 @@ static int mt7988_infracfg_probe(struct udevice *dev) return mtk_common_clk_init(dev, &mt7988_infracfg_clk_tree); } -U_BOOT_DRIVER(mtk_clk_infracfg) = { +U_BOOT_DRIVER(mt7988_clk_infracfg) = { .name = "mt7988-clock-infracfg", .id = UCLASS_CLK, .of_match = mt7988_infracfg_compat, @@ -959,7 +959,7 @@ static const struct udevice_id mt7988_ethdma_compat[] = { {} }; -U_BOOT_DRIVER(mtk_clk_ethdma) = { +U_BOOT_DRIVER(mt7988_clk_ethdma) = { .name = "mt7988-clock-ethdma", .id = UCLASS_CLK, .of_match = mt7988_ethdma_compat, @@ -1005,7 +1005,7 @@ static const struct udevice_id mt7988_sgmiisys_0_compat[] = { {} }; -U_BOOT_DRIVER(mtk_clk_sgmiisys_0) = { +U_BOOT_DRIVER(mt7988_clk_sgmiisys_0) = { .name = "mt7988-clock-sgmiisys_0", .id = UCLASS_CLK, .of_match = mt7988_sgmiisys_0_compat, @@ -1050,7 +1050,7 @@ static const struct udevice_id mt7988_sgmiisys_1_compat[] = { {} }; -U_BOOT_DRIVER(mtk_clk_sgmiisys_1) = { +U_BOOT_DRIVER(mt7988_clk_sgmiisys_1) = { .name = "mt7988-clock-sgmiisys_1", .id = UCLASS_CLK, .of_match = mt7988_sgmiisys_1_compat, @@ -1110,7 +1110,7 @@ static const struct udevice_id mt7988_ethwarp_compat[] = { {} }; -U_BOOT_DRIVER(mtk_clk_ethwarp) = { +U_BOOT_DRIVER(mt7988_clk_ethwarp) = { .name = "mt7988-clock-ethwarp", .id = UCLASS_CLK, .of_match = mt7988_ethwarp_compat, |