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authorJohan Jonker <[email protected]>2022-04-09 18:55:08 +0200
committerKever Yang <[email protected]>2022-04-18 11:25:13 +0800
commit9d75dafb1bee4cdc165c3c3ca246e9bc70690a7f (patch)
tree6caef2a43ca4ab7410170f9123da16a892df19e9
parent3930209526b32d9075ee9c01e87ee50201934313 (diff)
rockchip: mmc: rockchip_dw_mmc: fix ciu clock index
The document rockchip-dw-mshc.yaml decribes a maximum of 4 clocks. In the rockchip_dw_mmc driver the clock name in use was "fixed" to "ciu" with index 1, but later reverted back to index 0. The clock drivers can handle both, but the calling driver should submit correct data as a standard practice. Fix the "ciu" clock index by setting it back to 1. clock-names: minItems: 2 items: - const: biu - const: ciu - const: ciu-drive - const: ciu-sample Signed-off-by: Johan Jonker <[email protected]> Reviewed-by: Kever Yang <[email protected]>
-rw-r--r--drivers/mmc/rockchip_dw_mmc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 7f8dea1e343..be065ec0c34 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -123,11 +123,11 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
priv->minmax[0] = 400000; /* 400 kHz */
priv->minmax[1] = dtplat->max_frequency;
- ret = clk_get_by_phandle(dev, dtplat->clocks, &priv->clk);
+ ret = clk_get_by_phandle(dev, &dtplat->clocks[1], &priv->clk);
if (ret < 0)
return ret;
#else
- ret = clk_get_by_index(dev, 0, &priv->clk);
+ ret = clk_get_by_index(dev, 1, &priv->clk);
if (ret < 0)
return ret;
#endif