diff options
| author | Anshul Dalal <[email protected]> | 2025-10-17 18:45:26 +0530 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-10-22 12:05:52 -0600 |
| commit | 9ebdbbc43e5fb5841d85ec7ebcb1dbf07f4c87b0 (patch) | |
| tree | feafca258b17a09b8a5a232fe3ed4c42a4cd15a6 | |
| parent | 567a683e8ced54c3ffa53f62a4ed7e535268c6f2 (diff) | |
arm: armv8: invalidate dcache entries on dcache_enable
In dcache_enable, currently the dcache entries are only invalidated when
the MMU is not enabled. This causes issues when dcache_enable is called
with the MMU already configured, in such cases the existing dcache
entries are not flushed which might result in un-expected behavior.
This patch invalidates the cache entries on every call of dcache_enable
before enabling dcache (by setting CR_C). This makes dcache_enable
behave similar to icache_enable as well.
Reviewed-by: Dhruva Gole <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Anshul Dalal <[email protected]>
Tested-by: Wadim Egorov <[email protected]>
| -rw-r--r-- | arch/arm/cpu/armv8/cache_v8.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index a7899857658..74c78cb2fb0 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -830,16 +830,15 @@ void flush_dcache_range(unsigned long start, unsigned long stop) void dcache_enable(void) { /* The data cache is not active unless the mmu is enabled */ - if (!(get_sctlr() & CR_M)) { - invalidate_dcache_all(); - __asm_invalidate_tlb_all(); + if (!mmu_status()) mmu_setup(); - } /* Set up page tables only once (it is done also by mmu_setup()) */ if (!gd->arch.tlb_fillptr) setup_all_pgtables(); + invalidate_dcache_all(); + __asm_invalidate_tlb_all(); set_sctlr(get_sctlr() | CR_C); } |