diff options
| author | Jagan Teki <[email protected]> | 2019-07-16 17:27:06 +0530 |
|---|---|---|
| committer | Kever Yang <[email protected]> | 2019-07-20 23:59:44 +0800 |
| commit | a735550bb8471a170247fad5376d0086b15ddedd (patch) | |
| tree | 20b51261bcb82bccc4709b0eb58b64068a317a1c | |
| parent | ed77ce728aa2cd2c8b1c01ec3a0f2efb8f3edc26 (diff) | |
ram: rk3399: Add DdrMode
Add DdrMode structure with associated bit fields.
These would help to reconfigure sdram capabilities during
lpddr4 setup related configs.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
| -rw-r--r-- | arch/arm/include/asm/arch-rockchip/sdram_rk3399.h | 17 | ||||
| -rw-r--r-- | drivers/ram/rockchip/sdram_rk3399.c | 2 |
2 files changed, 17 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h index 7f41a672426..dc65ae79243 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h +++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h @@ -28,6 +28,21 @@ union noc_ddrtimingc0 { } b; }; +union noc_ddrmode { + u32 d32; + struct { + unsigned autoprecharge : 1; + unsigned bypassfiltering : 1; + unsigned fawbank : 1; + unsigned burstsize : 2; + unsigned mwrsize : 2; + unsigned reserved2 : 1; + unsigned forceorder : 8; + unsigned forceorderstate : 8; + unsigned reserved3 : 8; + } b; +}; + struct rk3399_msch_regs { u32 coreid; u32 revisionid; @@ -48,7 +63,7 @@ struct rk3399_msch_timings { u32 ddrtimingb0; union noc_ddrtimingc0 ddrtimingc0; u32 devtodev0; - u32 ddrmode; + union noc_ddrmode ddrmode; u32 agingx0; }; diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index d47e2907c75..5568ad98461 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -1114,7 +1114,7 @@ static void dram_all_config(struct dram_info *dram, &ddr_msch_regs->ddrtimingc0); writel(noc_timing->devtodev0, &ddr_msch_regs->devtodev0); - writel(noc_timing->ddrmode, + writel(noc_timing->ddrmode.d32, &ddr_msch_regs->ddrmode); /* rank 1 memory clock disable (dfi_dram_clk_disable = 1) */ |