diff options
| author | Michal Simek <[email protected]> | 2021-06-01 16:42:02 +0200 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2021-06-23 09:48:35 +0200 |
| commit | abd30371d33ea187216e9bf2687496eda8a11de6 (patch) | |
| tree | fe1a2692b1e2bad947b9bb24ea8b663f1a1ea9eb | |
| parent | af04516992cf3e1f70843f372ceee932a9aebd97 (diff) | |
arm64: zynqmp: Sync dp port location on zc1751 dc4
Historically dpdma and dpsub are placed at the end of files. Move nodes
there for easier comparison among dts files.
Signed-off-by: Michal Simek <[email protected]>
| -rw-r--r-- | arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts index aadda179c32..48acea62c88 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm018-dc4 * - * (C) Copyright 2015 - 2020, Xilinx, Inc. + * (C) Copyright 2015 - 2021, Xilinx, Inc. * * Michal Simek <[email protected]> */ @@ -115,14 +115,6 @@ status = "okay"; }; -&zynqmp_dpsub { - status = "okay"; -}; - -&zynqmp_dpdma { - status = "okay"; -}; - &gem0 { status = "okay"; phy-mode = "rgmii-id"; @@ -221,3 +213,11 @@ &watchdog0 { status = "okay"; }; + +&zynqmp_dpdma { + status = "okay"; +}; + +&zynqmp_dpsub { + status = "okay"; +}; |