diff options
| author | Peng Fan <[email protected]> | 2026-06-17 22:14:46 +0800 |
|---|---|---|
| committer | Fabio Estevam <[email protected]> | 2026-07-27 11:25:30 -0300 |
| commit | ae31cc745bcb4775b7d8e17a73a3d09f137c9d22 (patch) | |
| tree | a2c9292b4f6ee9d7143b7c0e43bf00dc75d36b40 | |
| parent | 047ed967843af5eb5f24f78910635b61b3c378a1 (diff) | |
imx9: scmi: reset GPIO2 according its node status
Check the GPIO2 dts node status to determine reset it or not.
On iMX952 single SPL/U-Boot image is shared for both mx952evk
and mx952evkrpmsg SM configs. GPIO2 is assigned to M7 domain
in mx952evkrpmsg, and there is no active user of GPIO2 for
mx952evk and mx952evkrpmsg in SPL/U-Boot, so it is disabled in
DTS. Otherwise, reset GPIO2 will meet hang when working with
mx952evkrpmsg SM.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
| -rw-r--r-- | arch/arm/mach-imx/imx9/scmi/soc.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/imx9/scmi/soc.c b/arch/arm/mach-imx/imx9/scmi/soc.c index 0cba2d92abb..6561de205d0 100644 --- a/arch/arm/mach-imx/imx9/scmi/soc.c +++ b/arch/arm/mach-imx/imx9/scmi/soc.c @@ -14,6 +14,7 @@ #include <asm/setup.h> #include <dm/uclass.h> #include <dm/device.h> +#include <dm/ofnode.h> #include <env_internal.h> #include <fuse.h> #include <imx_thermal.h> @@ -1051,6 +1052,22 @@ static void gpio_reset(ulong gpio_base) writel(0, gpio_base + 0x1c); } +static int gpio_available(const char *nodes_path) +{ + ofnode gpio_node = ofnode_path(nodes_path); + const char *status; + + if (!ofnode_valid(gpio_node)) + return false; + + status = ofnode_read_string(gpio_node, "status"); + + if (status && !strcmp(status, "disabled")) + return false; + + return true; +} + int arch_cpu_init(void) { if (IS_ENABLED(CONFIG_SPL_BUILD)) { @@ -1066,7 +1083,9 @@ int arch_cpu_init(void) disable_wdog((void __iomem *)base); } - gpio_reset(GPIO2_BASE_ADDR); + if (gpio_available("/soc/gpio@43810000")) + gpio_reset(GPIO2_BASE_ADDR); + gpio_reset(GPIO3_BASE_ADDR); gpio_reset(GPIO4_BASE_ADDR); gpio_reset(GPIO5_BASE_ADDR); |