diff options
| author | Marek Vasut <[email protected]> | 2024-07-08 13:43:23 +0200 |
|---|---|---|
| committer | Patrick Delaunay <[email protected]> | 2024-09-25 19:40:46 +0200 |
| commit | b0348a97de9e01fe2165520cfc1bc9ed5594f9ab (patch) | |
| tree | aefd6eefd8765f43d96cca934bce06fd695b12fe | |
| parent | 6b84683acc86f94c7dc15d621b5bca533bf8a01a (diff) | |
ARM: stm32: Fix secure_waitbits() mask check
Do not apply bitwise AND to register value and expected value, only
apply bitwise AND to register value and mask, and only then compare
the result with expected value that the function polls for.
Fixes: b49105320a5b ("stm32mp: psci: Implement PSCI system suspend and DRAM SSR")
Signed-off-by: Marek Vasut <[email protected]>
| -rw-r--r-- | arch/arm/mach-stm32mp/stm32mp1/psci.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-stm32mp/stm32mp1/psci.c b/arch/arm/mach-stm32mp/stm32mp1/psci.c index bfbf420fdb5..a02a8988a68 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/psci.c +++ b/arch/arm/mach-stm32mp/stm32mp1/psci.c @@ -393,8 +393,7 @@ static int __secure secure_waitbits(u32 reg, u32 mask, u32 val) asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (start)); for (;;) { tmp = readl(reg); - tmp &= mask; - if ((tmp & val) == val) + if ((tmp & mask) == val) return 0; asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (end)); if ((end - start) > delay) |