diff options
| author | Peng Fan <[email protected]> | 2025-07-28 18:25:29 +0800 |
|---|---|---|
| committer | Fabio Estevam <[email protected]> | 2025-08-07 08:15:24 -0300 |
| commit | b1a89c5232f783400669235f148cc0f39accd333 (patch) | |
| tree | 47131d4f6818a32861096abb98eb382082684a2c | |
| parent | 66324e0cecaa99bf99dd39b5bca7f292b4225e0d (diff) | |
imx8m: clock: Correct imx8mm_fracpll_tbl
The minimum frequency of Fref (Fin / p) is 6MHz for the PLL AC
Electrical Characteristics. Setting p with 9 or 8 voilates the Spec.
Update the settings to match Spec.
Signed-off-by: Peng Fan <[email protected]>
| -rw-r--r-- | arch/arm/mach-imx/imx8m/clock_imx8mm.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index d5745f67262..77c8efc7899 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -55,16 +55,16 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { PLL_1443X_RATE(1000000000U, 250, 3, 1, 0), PLL_1443X_RATE(933000000U, 311, 4, 1, 0), - PLL_1443X_RATE(900000000U, 300, 8, 0, 0), - PLL_1443X_RATE(800000000U, 300, 9, 0, 0), - PLL_1443X_RATE(750000000U, 250, 8, 0, 0), + PLL_1443X_RATE(900000000U, 300, 2, 2, 0), + PLL_1443X_RATE(800000000U, 200, 3, 1, 0), + PLL_1443X_RATE(750000000U, 250, 2, 2, 0), PLL_1443X_RATE(650000000U, 325, 3, 2, 0), PLL_1443X_RATE(600000000U, 300, 3, 2, 0), PLL_1443X_RATE(594000000U, 99, 1, 2, 0), - PLL_1443X_RATE(400000000U, 300, 9, 1, 0), - PLL_1443X_RATE(266000000U, 400, 9, 2, 0), + PLL_1443X_RATE(400000000U, 400, 3, 3, 0), + PLL_1443X_RATE(266000000U, 266, 3, 3, 0), PLL_1443X_RATE(167000000U, 334, 3, 4, 0), - PLL_1443X_RATE(100000000U, 300, 9, 3, 0), + PLL_1443X_RATE(100000000U, 200, 3, 4, 0), }; static int fracpll_configure(enum pll_clocks pll, u32 freq) |