diff options
| author | Jonas Karlman <[email protected]> | 2025-04-07 22:46:40 +0000 |
|---|---|---|
| committer | Kever Yang <[email protected]> | 2025-04-23 22:12:03 +0800 |
| commit | b53e33cffc2318f1d3f637d58c7e73099e972a2a (patch) | |
| tree | f6194d8c3398659dabc9f7943aff0141b87455b9 | |
| parent | d387fd20d56f87d0488fca9dc6e7809c07a188c6 (diff) | |
arm64: dts: rockchip: Add SARADC node for RK3528
Add a device tree node for the SARADC controller used by RK3528.
Signed-off-by: Jonas Karlman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
[ upstream commit: 6e58302c84ce90aadbecd41efe1f69098a6f91e5 ]
(cherry picked from commit 8ba64ba5cb301bca777ba7f0d2a2a72f49af5ff2)
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
| -rw-r--r-- | dts/upstream/src/arm64/rockchip/rk3528.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/dts/upstream/src/arm64/rockchip/rk3528.dtsi b/dts/upstream/src/arm64/rockchip/rk3528.dtsi index 4be53868f32..c2eaa0c6ea9 100644 --- a/dts/upstream/src/arm64/rockchip/rk3528.dtsi +++ b/dts/upstream/src/arm64/rockchip/rk3528.dtsi @@ -9,6 +9,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/clock/rockchip,rk3528-cru.h> +#include <dt-bindings/reset/rockchip,rk3528-cru.h> / { compatible = "rockchip,rk3528"; @@ -455,6 +456,18 @@ status = "disabled"; }; + saradc: adc@ffae0000 { + compatible = "rockchip,rk3528-saradc"; + reg = <0x0 0xffae0000 0x0 0x10000>; + clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; + resets = <&cru SRST_P_SARADC>; + reset-names = "saradc-apb"; + #io-channel-cells = <1>; + status = "disabled"; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3528-pinctrl"; rockchip,grf = <&ioc_grf>; |
