diff options
| author | Dinesh Maniyam <[email protected]> | 2025-02-27 00:18:23 +0800 |
|---|---|---|
| committer | Michael Trimarchi <[email protected]> | 2025-03-15 10:35:01 +0100 |
| commit | b820fa95778493f20fedc8b2f2ab0c08f57e1f4b (patch) | |
| tree | 79219d102ea7992d083fc22f085d2c69ae4e7e60 | |
| parent | 36b2a5d676b4a13c8e66b30d8ff99a5e529fd6d2 (diff) | |
drivers: mtd: nand: cadence: Flush & invalidate dma descriptor
Ensure ddr memory is updated with the data from dcache.
This would help to ensure cdma always reading the latest dma descriptor
from ddr memory.
Signed-off-by: Dinesh Maniyam <[email protected]>
| -rw-r--r-- | drivers/mtd/nand/raw/cadence_nand.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/cadence_nand.c b/drivers/mtd/nand/raw/cadence_nand.c index 71bab973776..a717987be67 100644 --- a/drivers/mtd/nand/raw/cadence_nand.c +++ b/drivers/mtd/nand/raw/cadence_nand.c @@ -430,6 +430,10 @@ cadence_nand_cdma_desc_prepare(struct cadence_nand_info *cadence, cdma_desc->command_type = ctype; cdma_desc->ctrl_data_ptr = ctrl_data_ptr; + + flush_cache((dma_addr_t)cadence->cdma_desc, + ROUND(sizeof(struct cadence_nand_cdma_desc), + ARCH_DMA_MINALIGN)); } static u8 cadence_nand_check_desc_error(struct cadence_nand_info *cadence, @@ -457,6 +461,11 @@ static int cadence_nand_cdma_finish(struct cadence_nand_info *cadence) struct cadence_nand_cdma_desc *desc_ptr = cadence->cdma_desc; u8 status = STAT_BUSY; + invalidate_dcache_range((dma_addr_t)cadence->cdma_desc, + (dma_addr_t)cadence->cdma_desc + + ROUND(sizeof(struct cadence_nand_cdma_desc), + ARCH_DMA_MINALIGN)); + if (desc_ptr->status & CDMA_CS_FAIL) { status = cadence_nand_check_desc_error(cadence, desc_ptr->status); |