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authorTom Rini <[email protected]>2025-09-23 08:24:59 -0600
committerTom Rini <[email protected]>2025-09-23 08:24:59 -0600
commitb82a1fa7ddc7f3be2f3b75898d5dc44c34420bdd (patch)
tree6f9b7dceb47e46af0d1a40916eb8a66564ebd2c4
parentd81c1118580f3481b864b830fe5b789519993bd3 (diff)
parent2f2ab7e13a69367cc9b88a45899e24dba02667c6 (diff)
Merge tag 'v2025.10-rc5' into next
Prepare v2025.10-rc5
-rw-r--r--Makefile5
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/cpu/armv8/spl_data.c6
-rw-r--r--arch/arm/dts/imx95-u-boot.dtsi44
-rw-r--r--arch/arm/dts/k3-j721e-r5-common-proc-board.dts1
-rw-r--r--arch/arm/include/asm/arch-imx9/clock.h2
-rw-r--r--arch/arm/mach-imx/Makefile5
-rw-r--r--arch/arm/mach-imx/imx8ulp/soc.c1
-rw-r--r--arch/arm/mach-imx/imx9/Kconfig5
-rw-r--r--arch/arm/mach-imx/imx9/scmi/container.cfg11
-rw-r--r--arch/arm/mach-imx/imx9/scmi/imximage.cfg16
-rw-r--r--arch/arm/mach-socfpga/spl_agilex.c2
-rw-r--r--arch/arm/mach-socfpga/spl_agilex5.c2
-rw-r--r--board/dhelectronics/dh_stm32mp1/board.c6
-rw-r--r--board/freescale/imx8ulp_evk/spl.c4
-rw-r--r--board/freescale/imx95_evk/MAINTAINERS1
-rw-r--r--board/phytec/phycore_imx93/spl.c37
-rw-r--r--board/starfive/visionfive2/spl.c16
-rw-r--r--board/starfive/visionfive2/starfive_visionfive2.c18
-rw-r--r--board/ti/am57xx/am57xx.env2
-rw-r--r--common/spl/Kconfig2
-rw-r--r--common/spl/spl_spi.c2
-rw-r--r--configs/coreboot_defconfig1
-rw-r--r--configs/imx95_19x19_evk_defconfig150
-rw-r--r--configs/imx95_a0_19x19_evk_defconfig2
-rw-r--r--configs/imx95_evk.config150
-rw-r--r--configs/j7200_evm_a72_defconfig1
-rw-r--r--configs/j7200_evm_r5_defconfig2
-rw-r--r--configs/j721e_evm_r5_defconfig2
-rw-r--r--configs/starfive_visionfive2_defconfig1
-rw-r--r--configs/xilinx_zynq_virt_defconfig6
-rw-r--r--configs/xilinx_zynqmp_kria_defconfig7
-rw-r--r--configs/xilinx_zynqmp_virt_defconfig7
-rw-r--r--doc/board/nxp/imx95_evk.rst42
-rw-r--r--doc/develop/release_cycle.rst2
-rw-r--r--drivers/clk/stm32/clk-stm32-core.c2
-rw-r--r--drivers/dma/ti/k3-udma.c6
-rw-r--r--drivers/mtd/Kconfig2
-rw-r--r--drivers/net/dwc_eth_qos_stm32.c44
-rw-r--r--drivers/usb/dwc3/ep0.c4
-rw-r--r--env/Kconfig2
-rw-r--r--tools/binman/entries.rst12
-rw-r--r--tools/binman/etype/nxp_imx9image.py89
-rw-r--r--tools/binman/ftest.py11
-rw-r--r--tools/binman/test/350_nxp_imx95.dts25
45 files changed, 473 insertions, 287 deletions
diff --git a/Makefile b/Makefile
index 9d2ac0c726d..0dc7da6ddac 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@
VERSION = 2025
PATCHLEVEL = 10
SUBLEVEL =
-EXTRAVERSION = -rc4
+EXTRAVERSION = -rc5
NAME =
# *DOCUMENTATION*
@@ -2469,7 +2469,8 @@ CLEAN_FILES += include/autoconf.mk* include/bmp_logo.h include/bmp_logo_data.h \
mkimage.rom.mkimage mkimage-in-simple-bin* rom.map simple-bin* \
idbloader-spi.img lib/efi_loader/helloworld_efi.S *.itb \
Test* capsule*.*.efi-capsule capsule*.map mkimage.imx-boot.spl \
- mkimage.imx-boot.u-boot mkimage-out.imx-boot.spl mkimage-out.imx-boot.u-boot
+ mkimage.imx-boot.u-boot mkimage-out.imx-boot.spl mkimage-out.imx-boot.u-boot \
+ imx9image* m33-oei-ddrfw*
# Directories & files removed with 'make mrproper'
MRPROPER_DIRS += include/config include/generated spl tpl vpl \
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 40368abc297..625d2e995d2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -833,6 +833,7 @@ config ARCH_K3
select FIT
select REGEX
select FIT_SIGNATURE if ARM64
+ select DMA_ADDR_T_64BIT
select LTO
imply TI_SECURE_DEVICE
imply DM_RNG if ARM64
@@ -2003,7 +2004,6 @@ config ARCH_SYNQUACER
bool "Socionext SynQuacer SoCs"
select ARM64
select DM
- select GIC_V3
select PSCI_RESET
select SYSRESET
select SYSRESET_PSCI
diff --git a/arch/arm/cpu/armv8/spl_data.c b/arch/arm/cpu/armv8/spl_data.c
index 492353c93df..f4009e89a98 100644
--- a/arch/arm/cpu/armv8/spl_data.c
+++ b/arch/arm/cpu/armv8/spl_data.c
@@ -11,15 +11,15 @@ char __data_save_end[0] __section(".__data_save_end");
u32 cold_reboot_flag = 1;
-u32 __weak reset_flag(void)
+u32 __weak reset_flag(u32 flag)
{
- return 1;
+ return flag;
}
void spl_save_restore_data(void)
{
u32 data_size = __data_save_end - __data_save_start;
- cold_reboot_flag = reset_flag();
+ cold_reboot_flag = reset_flag(cold_reboot_flag);
if (cold_reboot_flag == 1) {
/* Save data section to data_save section */
diff --git a/arch/arm/dts/imx95-u-boot.dtsi b/arch/arm/dts/imx95-u-boot.dtsi
index 27f8209b19c..591cb317508 100644
--- a/arch/arm/dts/imx95-u-boot.dtsi
+++ b/arch/arm/dts/imx95-u-boot.dtsi
@@ -52,15 +52,47 @@
pad-byte = <0x00>;
spl {
- align = <0x400>;
- align-size = <0x400>;
- type = "mkimage";
- args = "-n spl/u-boot-spl.cfgout -T imx8image";
+ type = "nxp-imx9image";
+ cfg-path = "spl/u-boot-spl.cfgout";
+ args;
+
+#ifndef CONFIG_IMX95_A0
+ cntr-version = <2>;
+#endif
+ boot-from = "sd";
+ soc-type = "IMX9";
+#ifdef CONFIG_IMX95_A0
+ append = "mx95a0-ahab-container.img";
+#else
+ append = "mx95b0-ahab-container.img";
+#endif
+ container;
+#ifndef CONFIG_IMX95_A0
+ dummy-ddr;
+#endif
+ image0 = "oei", "m33-oei-ddrfw.bin", "0x1ffc0000";
+ hold = <0x10000>;
+#ifdef CONFIG_IMX95_A0
+ image1 = "oei", "oei-m33-tcm.bin", "0x1ffc0000";
+#endif
+ image2 = "m33", "m33_image.bin", "0x1ffc0000";
+ image3 = "a55", "spl/u-boot-spl.bin", "0x20480000";
+ dummy-v2x = <0x8b000000>;
};
u-boot {
- type = "mkimage";
- args = "-n u-boot-container.cfgout -T imx8image";
+ type = "nxp-imx9image";
+ cfg-path = "u-boot-container.cfgout";
+ args;
+
+#ifndef CONFIG_IMX95_A0
+ cntr-version = <2>;
+#endif
+ boot-from = "sd";
+ soc-type = "IMX9";
+ container;
+ image0 = "a55", "bl31.bin", "0x8a200000";
+ image1 = "a55", "u-boot.bin", "0x90200000";
};
};
};
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index c775432505b..e4f799dfb27 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -52,6 +52,7 @@
};
&hbmc {
+ status = "okay";
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
ranges = <0x0 0x0 0x0 0x50000000 0x4000000>,
diff --git a/arch/arm/include/asm/arch-imx9/clock.h b/arch/arm/include/asm/arch-imx9/clock.h
index ffaf6b5f7d8..ddc84d2c9ed 100644
--- a/arch/arm/include/asm/arch-imx9/clock.h
+++ b/arch/arm/include/asm/arch-imx9/clock.h
@@ -111,7 +111,7 @@ struct ccm_reg {
u32 reserved_3[192];
struct ccm_lpcg_oscpll clk_oscplls[19]; /* 0x5000 */
u32 reserved_4[2768];
- struct ccm_lpcg_oscpll clk_lpcgs[122]; /* 0x8000 */
+ struct ccm_lpcg_oscpll clk_lpcgs[127]; /* 0x8000 */
};
struct ana_pll_reg_elem {
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 8bd85e889ab..fa2cdaba144 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -223,6 +223,10 @@ endif
ifeq ($(CONFIG_ARCH_IMX9)$(CONFIG_ARCH_IMX8ULP), y)
+ifneq ($(and $(CONFIG_IMX95),$(CONFIG_BINMAN)),)
+SPL: spl/u-boot-spl.bin FORCE
+ $(call if_changed,mkimage)
+else
quiet_cmd_cpp_cfg_imx9_check = CHECK $@
cmd_cpp_cfg_imx9_check = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -x c -o $@ $< && $(srctree)/tools/imx9_image.sh $@
@@ -244,6 +248,7 @@ u-boot-container.cfgout: $(IMX_CONTAINER_CFG) FORCE
flash.bin: spl/u-boot-spl-ddr.bin container.cfgout FORCE
$(call if_changed,mkimage)
endif
+endif
else
MKIMAGEFLAGS_SPL = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index e85cb0dd252..7640f9b84da 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -804,6 +804,7 @@ int imx8ulp_dm_post_init(void)
return 0;
}
EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx8ulp_dm_post_init);
+EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_R, imx8ulp_dm_post_init);
#if defined(CONFIG_XPL_BUILD)
__weak void __noreturn jump_to_image(struct spl_image_info *spl_image)
diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig
index 4e0e194690b..b6acbb20ff0 100644
--- a/arch/arm/mach-imx/imx9/Kconfig
+++ b/arch/arm/mach-imx/imx9/Kconfig
@@ -25,6 +25,9 @@ config IMX91
select ARCH_MISC_INIT
select ARMV8_SPL_EXCEPTION_VECTORS
+config IMX95_A0
+ bool "Support for i.MX95 A0 silicon version"
+
config IMX95
bool
select ARCH_MISC_INIT
@@ -33,7 +36,7 @@ config IMX95
select DM_MAILBOX
select SCMI_FIRMWARE
select SPL_IMX_CONTAINER_USE_TRAMPOLINE
- select IMX_PQC_SUPPORT
+ select IMX_PQC_SUPPORT if !IMX95_A0
config SYS_SOC
default "imx9"
diff --git a/arch/arm/mach-imx/imx9/scmi/container.cfg b/arch/arm/mach-imx/imx9/scmi/container.cfg
deleted file mode 100644
index b25f3b726c5..00000000000
--- a/arch/arm/mach-imx/imx9/scmi/container.cfg
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2025 NXP
- */
-
-CNTR_VERSION 2
-BOOT_FROM SD
-SOC_TYPE IMX9
-CONTAINER
-IMAGE A55 bl31.bin 0x8a200000
-IMAGE A55 u-boot.bin CONFIG_TEXT_BASE
diff --git a/arch/arm/mach-imx/imx9/scmi/imximage.cfg b/arch/arm/mach-imx/imx9/scmi/imximage.cfg
deleted file mode 100644
index c2c92174c1c..00000000000
--- a/arch/arm/mach-imx/imx9/scmi/imximage.cfg
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2025 NXP
- */
-
-CNTR_VERSION 2
-BOOT_FROM SD
-SOC_TYPE IMX9
-APPEND mx95b0-ahab-container.img
-CONTAINER
-DUMMY_DDR
-IMAGE OEI m33-oei-ddrfw.bin 0x1ffc0000
-HOLD 0x10000
-IMAGE M33 m33_image.bin 0x1ffc0000
-IMAGE A55 spl/u-boot-spl.bin 0x20480000
-DUMMY_V2X 0x8b000000
diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c
index 351848f16e6..48f258a37b4 100644
--- a/arch/arm/mach-socfpga/spl_agilex.c
+++ b/arch/arm/mach-socfpga/spl_agilex.c
@@ -24,7 +24,7 @@
DECLARE_GLOBAL_DATA_PTR;
-u32 reset_flag(void)
+u32 reset_flag(u32 flag)
{
/* Check rstmgr.stat for warm reset status */
u32 status = readl(SOCFPGA_RSTMGR_ADDRESS);
diff --git a/arch/arm/mach-socfpga/spl_agilex5.c b/arch/arm/mach-socfpga/spl_agilex5.c
index 2e3597e97eb..1be347360f5 100644
--- a/arch/arm/mach-socfpga/spl_agilex5.c
+++ b/arch/arm/mach-socfpga/spl_agilex5.c
@@ -21,7 +21,7 @@
DECLARE_GLOBAL_DATA_PTR;
-u32 reset_flag(void)
+u32 reset_flag(u32 flag)
{
/* Check rstmgr.stat for warm reset status */
u32 status = readl(SOCFPGA_RSTMGR_ADDRESS);
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
index f7347bbb826..bd9326d6b1b 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -85,6 +85,9 @@ static bool dh_stm32_mac_is_in_ks8851(void)
if (!ofnode_valid(node))
return false;
+ if (!ofnode_device_is_compatible(node, "micrel,ks8851-mll"))
+ return false;
+
ret = ofnode_get_path(node, path, sizeof(path));
if (ret)
return false;
@@ -93,9 +96,6 @@ static bool dh_stm32_mac_is_in_ks8851(void)
if (ret)
return false;
- if (!ofnode_device_is_compatible(node, "micrel,ks8851-mll"))
- return false;
-
/*
* KS8851 with EEPROM may use custom MAC from EEPROM, read
* out the KS8851 CCR register to determine whether EEPROM
diff --git a/board/freescale/imx8ulp_evk/spl.c b/board/freescale/imx8ulp_evk/spl.c
index d123b21b722..fe637077928 100644
--- a/board/freescale/imx8ulp_evk/spl.c
+++ b/board/freescale/imx8ulp_evk/spl.c
@@ -69,8 +69,8 @@ void display_ele_fw_version(void)
} else {
printf("ELE firmware version %u.%u.%u-%x",
(fw_version & (0x00ff0000)) >> 16,
- (fw_version & (0x0000ff00)) >> 8,
- (fw_version & (0x000000ff)), sha1);
+ (fw_version & (0x0000fff0)) >> 4,
+ (fw_version & (0x0000000f)), sha1);
((fw_version & (0x80000000)) >> 31) == 1 ? puts("-dirty\n") : puts("\n");
}
}
diff --git a/board/freescale/imx95_evk/MAINTAINERS b/board/freescale/imx95_evk/MAINTAINERS
index 5caf763e0cc..9d5c4e41b65 100644
--- a/board/freescale/imx95_evk/MAINTAINERS
+++ b/board/freescale/imx95_evk/MAINTAINERS
@@ -3,4 +3,5 @@ M: Alice Guo <[email protected]>
S: Maintained
F: board/freescale/imx95_evk/
F: include/configs/imx95_evk.h
+F: configs/imx95_a0_19x19_evk_defconfig
F: configs/imx95_19x19_evk_defconfig
diff --git a/board/phytec/phycore_imx93/spl.c b/board/phytec/phycore_imx93/spl.c
index 7feee4bcf6f..aa7d562911a 100644
--- a/board/phytec/phycore_imx93/spl.c
+++ b/board/phytec/phycore_imx93/spl.c
@@ -93,7 +93,7 @@ int power_init_board(void)
{
struct udevice *dev;
int ret;
- unsigned int val = 0;
+ unsigned int val = 0, buck_val;
ret = pmic_get("pmic@25", &dev);
if (ret == -ENODEV) {
@@ -115,24 +115,23 @@ int power_init_board(void)
return ret;
val = ret;
- if (IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE)) {
- /* 0.8v for Low drive mode */
- if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) {
- pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x0c);
- pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x0c);
- } else {
- pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x10);
- pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x10);
- }
+ if (is_voltage_mode(VOLT_LOW_DRIVE)) {
+ buck_val = 0x0c; /* 0.8v for Low drive mode */
+ printf("PMIC: Low Drive Voltage Mode\n");
+ } else if (is_voltage_mode(VOLT_NOMINAL_DRIVE)) {
+ buck_val = 0x10; /* 0.85v for Nominal drive mode */
+ printf("PMIC: Nominal Voltage Mode\n");
} else {
- /* 0.9v for Over drive mode */
- if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) {
- pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14);
- pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x14);
- } else {
- pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18);
- pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18);
- }
+ buck_val = 0x14; /* 0.9v for Over drive mode */
+ printf("PMIC: Over Drive Voltage Mode\n");
+ }
+
+ if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) {
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val);
+ pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val);
+ } else {
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val + 0x4);
+ pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val + 0x4);
}
/* set standby voltage to 0.65v */
@@ -174,7 +173,7 @@ void board_init_f(ulong dummy)
power_init_board();
- if (!IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE))
+ if (!is_voltage_mode(VOLT_LOW_DRIVE))
set_arm_core_max_clk();
/* Init power of mix */
diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c
index fe14b44ce28..420a8cf8d91 100644
--- a/board/starfive/visionfive2/spl.c
+++ b/board/starfive/visionfive2/spl.c
@@ -127,19 +127,11 @@ int board_fit_config_name_match(const char *name)
!strncmp(get_product_id_from_eeprom(), "STAR64", 6)) {
return 0;
} else if (!strcmp(name, "starfive/jh7110-starfive-visionfive-2-v1.2a") &&
- !strncmp(get_product_id_from_eeprom(), "VF7110", 6)) {
- switch (get_pcb_revision_from_eeprom()) {
- case 'a':
- case 'A':
- return 0;
- }
+ !strncmp(get_product_id_from_eeprom(), "VF7110A", 7)) {
+ return 0;
} else if (!strcmp(name, "starfive/jh7110-starfive-visionfive-2-v1.3b") &&
- !strncmp(get_product_id_from_eeprom(), "VF7110", 6)) {
- switch (get_pcb_revision_from_eeprom()) {
- case 'b':
- case 'B':
- return 0;
- }
+ !strncmp(get_product_id_from_eeprom(), "VF7110B", 7)) {
+ return 0;
}
return -EINVAL;
diff --git a/board/starfive/visionfive2/starfive_visionfive2.c b/board/starfive/visionfive2/starfive_visionfive2.c
index bfbb11a2ee7..6271974b9c7 100644
--- a/board/starfive/visionfive2/starfive_visionfive2.c
+++ b/board/starfive/visionfive2/starfive_visionfive2.c
@@ -59,20 +59,10 @@ static void set_fdtfile(void)
fdtfile = "starfive/jh7110-milkv-mars.dtb";
} else if (!strncmp(get_product_id_from_eeprom(), "STAR64", 6)) {
fdtfile = "starfive/jh7110-pine64-star64.dtb";
- } else if (!strncmp(get_product_id_from_eeprom(), "VF7110", 6)) {
- switch (get_pcb_revision_from_eeprom()) {
- case 'a':
- case 'A':
- fdtfile = "starfive/jh7110-starfive-visionfive-2-v1.2a.dtb";
- break;
- case 'b':
- case 'B':
- fdtfile = "starfive/jh7110-starfive-visionfive-2-v1.3b.dtb";
- break;
- default:
- log_err("Unknown revision\n");
- return;
- }
+ } else if (!strncmp(get_product_id_from_eeprom(), "VF7110A", 7)) {
+ fdtfile = "starfive/jh7110-starfive-visionfive-2-v1.2a.dtb";
+ } else if (!strncmp(get_product_id_from_eeprom(), "VF7110B", 7)) {
+ fdtfile = "starfive/jh7110-starfive-visionfive-2-v1.3b.dtb";
} else {
log_err("Unknown product\n");
return;
diff --git a/board/ti/am57xx/am57xx.env b/board/ti/am57xx/am57xx.env
index 7d029a3e859..a7cbbced099 100644
--- a/board/ti/am57xx/am57xx.env
+++ b/board/ti/am57xx/am57xx.env
@@ -10,7 +10,7 @@ get_name_kern=
else
setenv bootfile zImage;
fi
-get_fit_config=setenv name_fit_config ${fdtfile}
+get_fit_config=setexpr name_fit_config gsub "ti/omap/" "" ${fdtfile}
console=ttyS2,115200n8
fdtfile=undefined
finduuid=part uuid mmc 0:2 uuid
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index ab05536bd02..f34b96efc02 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1141,7 +1141,7 @@ config SPL_DM_SPI
config SPL_DM_SPI_FLASH
bool "Support SPI DM FLASH drivers in SPL"
- depends on SPL_DM
+ depends on SPL_DM_SPI
help
Enable support for SPI DM flash drivers in SPL.
diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index 00dbd3011f0..c2b188371c2 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -80,7 +80,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
spl_load_init(&load, spl_spi_fit_read, flash, 1);
#if CONFIG_IS_ENABLED(OS_BOOT)
- if (spl_start_uboot()) {
+ if (!spl_start_uboot()) {
int err = spl_load(spl_image, bootdev, &load, 0,
CONFIG_SYS_SPI_KERNEL_OFFS);
diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig
index dfb97a3d302..b49fc80167b 100644
--- a/configs/coreboot_defconfig
+++ b/configs/coreboot_defconfig
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="coreboot"
CONFIG_PRE_CON_BUF_ADDR=0x100000
CONFIG_VENDOR_COREBOOT=y
CONFIG_TARGET_COREBOOT=y
+CONFIG_X86_LOAD_FROM_32_BIT=y
CONFIG_SYS_MONITOR_BASE=0x01110000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
diff --git a/configs/imx95_19x19_evk_defconfig b/configs/imx95_19x19_evk_defconfig
index f0a31dbda7b..542b71f5c07 100644
--- a/configs/imx95_19x19_evk_defconfig
+++ b/configs/imx95_19x19_evk_defconfig
@@ -1,149 +1 @@
-CONFIG_ARM=y
-CONFIG_ARCH_IMX9=y
-CONFIG_TEXT_BASE=0x90200000
-CONFIG_SYS_MALLOC_LEN=0x2000000
-CONFIG_SYS_MALLOC_F_LEN=0x10000
-CONFIG_SPL_GPIO=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=3
-CONFIG_ENV_SOURCE_FILE="imx95_19x19_evk"
-CONFIG_SF_DEFAULT_SPEED=40000000
-CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_OFFSET=0x700000
-CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/scmi/imximage.cfg"
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="freescale/imx95-19x19-evk"
-CONFIG_TARGET_IMX95_19X19_EVK=y
-CONFIG_OF_LIBFDT_OVERLAY=y
-CONFIG_SYS_MONITOR_LEN=524288
-CONFIG_SPL_MMC=y
-CONFIG_SPL_SERIAL=y
-CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_SPL_TEXT_BASE=0x20480000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x204d6000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
-CONFIG_SYS_LOAD_ADDR=0x90400000
-CONFIG_SPL=y
-CONFIG_SPL_RECOVER_DATA_SECTION=y
-CONFIG_PCI=y
-CONFIG_SYS_MEMTEST_START=0x90000000
-CONFIG_SYS_MEMTEST_END=0xA0000000
-CONFIG_REMAKE_ELF=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_BOOTCOMMAND="bootflow scan -l; run bsp_bootcmd"
-CONFIG_DEFAULT_FDT_FILE="imx95-19x19-evk.dtb"
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_BOARD_EARLY_INIT_F=y
-# CONFIG_BOARD_INIT is not set
-CONFIG_BOARD_LATE_INIT=y
-CONFIG_PCI_INIT_R=y
-CONFIG_SPL_MAX_SIZE=0x20000
-CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_LOAD_IMX_CONTAINER=y
-CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/scmi/container.cfg"
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_SYS_MALLOC=y
-CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
-CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x93200000
-CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
-CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040
-CONFIG_SPL_I2C=y
-CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_POWER=y
-CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_PROMPT="u-boot=> "
-CONFIG_CMD_ERASEENV=y
-CONFIG_CMD_NVEDIT_EFI=y
-CONFIG_CRC32_VERIFY=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_CLK=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_FUSE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_POWEROFF=y
-CONFIG_CMD_SNTP=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EFIDEBUG=y
-CONFIG_CMD_RTC=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_GETTIME=y
-CONFIG_CMD_TIMER=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_HASH=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_NOWHERE=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_ENV_RELOC_GD_ENV_ADDR=y
-CONFIG_ENV_MMC_DEVICE_INDEX=1
-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_USE_ETHPRIME=y
-CONFIG_ETHPRIME="eth0"
-CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_SYS_RX_ETH_BUFFER=8
-CONFIG_SPL_DM=y
-CONFIG_SPL_OF_TRANSLATE=y
-CONFIG_SPL_CLK=y
-CONFIG_SPL_CLK_CCF=y
-CONFIG_CLK_SCMI=y
-CONFIG_SPL_CLK_SCMI=y
-CONFIG_CLK_IMX95_BLKCTRL=y
-CONFIG_DFU_MMC=y
-CONFIG_DFU_RAM=y
-CONFIG_SPL_FIRMWARE=y
-# CONFIG_SCMI_AGENT_SMCCC is not set
-CONFIG_IMX_RGPIO2P=y
-CONFIG_DM_PCA953X=y
-CONFIG_ADP5585_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_IMX_LPI2C=y
-CONFIG_IMX_MU_MBOX=y
-CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS400_ES_SUPPORT=y
-CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_MT35XU=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_AQUANTIA=y
-CONFIG_PHY_REALTEK=y
-CONFIG_DM_MDIO=y
-CONFIG_MII=y
-CONFIG_FSL_ENETC=y
-CONFIG_PCIE_ECAM_GENERIC=y
-CONFIG_PCIE_DW_IMX=y
-CONFIG_PHY=y
-CONFIG_PINCTRL=y
-CONFIG_SPL_PINCTRL=y
-CONFIG_PINCTRL_IMX_SCMI=y
-CONFIG_POWER_DOMAIN=y
-CONFIG_SCMI_POWER_DOMAIN=y
-CONFIG_SPL_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_SPL_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_DM_RTC=y
-CONFIG_DM_SERIAL=y
-CONFIG_FSL_LPUART=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_NXP_FSPI=y
-CONFIG_ULP_WATCHDOG=y
-CONFIG_LZO=y
-CONFIG_BZIP2=y
+#include <configs/imx95_evk.config>
diff --git a/configs/imx95_a0_19x19_evk_defconfig b/configs/imx95_a0_19x19_evk_defconfig
new file mode 100644
index 00000000000..9376f11b151
--- /dev/null
+++ b/configs/imx95_a0_19x19_evk_defconfig
@@ -0,0 +1,2 @@
+#include <configs/imx95_evk.config>
+CONFIG_IMX95_A0=y
diff --git a/configs/imx95_evk.config b/configs/imx95_evk.config
new file mode 100644
index 00000000000..231b42cb377
--- /dev/null
+++ b/configs/imx95_evk.config
@@ -0,0 +1,150 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX9=y
+CONFIG_TEXT_BASE=0x90200000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x10000
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=3
+CONFIG_ENV_SOURCE_FILE="imx95_19x19_evk"
+CONFIG_SF_DEFAULT_SPEED=40000000
+CONFIG_ENV_SIZE=0x4000
+CONFIG_ENV_OFFSET=0x700000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx95-19x19-evk"
+CONFIG_TARGET_IMX95_19X19_EVK=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SYS_MONITOR_LEN=524288
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0x20480000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x204d6000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+CONFIG_SYS_LOAD_ADDR=0x90400000
+CONFIG_SPL=y
+CONFIG_SPL_RECOVER_DATA_SECTION=y
+CONFIG_PCI=y
+CONFIG_SYS_MEMTEST_START=0x90000000
+CONFIG_SYS_MEMTEST_END=0xA0000000
+CONFIG_REMAKE_ELF=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_BOOTCOMMAND="bootflow scan -l; run bsp_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="imx95-19x19-evk.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
+CONFIG_BOARD_EARLY_INIT_F=y
+# CONFIG_BOARD_INIT is not set
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_PCI_INIT_R=y
+CONFIG_SPL_MAX_SIZE=0x20000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_LOAD_IMX_CONTAINER=y
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x93200000
+CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
+CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040
+CONFIG_SPL_I2C=y
+CONFIG_SPL_DM_MAILBOX=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
+CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_RTC=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_GETTIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_HASH=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_MMC_DEVICE_INDEX=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_USE_ETHPRIME=y
+CONFIG_ETHPRIME="eth0"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SYS_RX_ETH_BUFFER=8
+CONFIG_SPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SPL_CLK_CCF=y
+CONFIG_CLK_CCF=y
+CONFIG_CLK_SCMI=y
+CONFIG_SPL_CLK_SCMI=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_SPL_FIRMWARE=y
+# CONFIG_SCMI_AGENT_SMCCC is not set
+CONFIG_IMX_RGPIO2P=y
+CONFIG_DM_PCA953X=y
+CONFIG_ADP5585_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_IMX_LPI2C=y
+CONFIG_IMX_MU_MBOX=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MT35XU=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_MDIO=y
+CONFIG_MII=y
+CONFIG_FSL_ENETC=y
+CONFIG_PCIE_ECAM_GENERIC=y
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_IMX_SCMI=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_SCMI_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RTC=y
+CONFIG_DM_SERIAL=y
+CONFIG_FSL_LPUART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_NXP_FSPI=y
+CONFIG_ULP_WATCHDOG=y
+CONFIG_LZO=y
+CONFIG_BZIP2=y
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig
index 36274804881..c657b0166e0 100644
--- a/configs/j7200_evm_a72_defconfig
+++ b/configs/j7200_evm_a72_defconfig
@@ -132,6 +132,7 @@ CONFIG_CFI_FLASH=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_HBMC_AM654=y
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig
index d97d331fdbd..09784f300db 100644
--- a/configs/j7200_evm_r5_defconfig
+++ b/configs/j7200_evm_r5_defconfig
@@ -116,6 +116,7 @@ CONFIG_CFI_FLASH=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_HBMC_AM654=y
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
@@ -124,6 +125,7 @@ CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_S28HX_T=y
CONFIG_MULTIPLEXER=y
+CONFIG_SPL_MUX_MMIO=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig
index ceb2e273b54..52290722686 100644
--- a/configs/j721e_evm_r5_defconfig
+++ b/configs/j721e_evm_r5_defconfig
@@ -124,6 +124,7 @@ CONFIG_CFI_FLASH=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_HBMC_AM654=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
@@ -133,6 +134,7 @@ CONFIG_SPI_FLASH_S28HX_T=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_MT35XU=y
CONFIG_MULTIPLEXER=y
+CONFIG_SPL_MUX_MMIO=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
index 03fcec7f121..34ebf3b605b 100644
--- a/configs/starfive_visionfive2_defconfig
+++ b/configs/starfive_visionfive2_defconfig
@@ -86,6 +86,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SECT_SIZE_AUTO=y
CONFIG_ENV_RELOC_GD_ENV_ADDR=y
CONFIG_NET_LWIP=y
+CONFIG_DNS=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
index 7a7abf66eb5..4412f52bbd2 100644
--- a/configs/xilinx_zynq_virt_defconfig
+++ b/configs/xilinx_zynq_virt_defconfig
@@ -45,15 +45,9 @@ CONFIG_SPL_HAVE_INIT_STACK=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb"
CONFIG_SPL_FPGA=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x10000000
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
-CONFIG_SYS_SPI_KERNEL_OFFS=0x280000
-CONFIG_SYS_SPI_ARGS_OFFS=0x200000
-CONFIG_SYS_SPI_ARGS_SIZE=0x80000
CONFIG_SYS_MAXARGS=32
# CONFIG_BOOTM_NETBSD is not set
CONFIG_CMD_IMLS=y
diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig
index 3e2ac614405..332e9401187 100644
--- a/configs/xilinx_zynqmp_kria_defconfig
+++ b/configs/xilinx_zynqmp_kria_defconfig
@@ -51,17 +51,10 @@ CONFIG_SPL_MAX_SIZE=0x40000
# CONFIG_SPL_BINMAN_SYMBOLS is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_HAVE_INIT_STACK=y
-CONFIG_SPL_FS_LOAD_KERNEL_NAME=""
-CONFIG_SPL_FS_LOAD_ARGS_NAME=""
CONFIG_SPL_FPGA=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x8000000
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
-CONFIG_SYS_SPI_KERNEL_OFFS=0x80000
-CONFIG_SYS_SPI_ARGS_OFFS=0xa0000
-CONFIG_SYS_SPI_ARGS_SIZE=0xa0000
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_CMD_SMBIOS=y
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index 65c8a4bbaad..b45ac8063fc 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -48,17 +48,10 @@ CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x20000000
CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000
-CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub"
-CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin"
CONFIG_SPL_FPGA=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x8000000
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
-CONFIG_SYS_SPI_KERNEL_OFFS=0x80000
-CONFIG_SYS_SPI_ARGS_OFFS=0xa0000
-CONFIG_SYS_SPI_ARGS_SIZE=0xa0000
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_CMD_SMBIOS=y
diff --git a/doc/board/nxp/imx95_evk.rst b/doc/board/nxp/imx95_evk.rst
index 27cd15eb7c9..709992e016d 100644
--- a/doc/board/nxp/imx95_evk.rst
+++ b/doc/board/nxp/imx95_evk.rst
@@ -25,6 +25,17 @@ Note: srctree is U-Boot source directory
$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-2.0.2-89161a8.bin
$ sh firmware-ele-imx-2.0.2-89161a8.bin --auto-accept
+
+i.MX95 A0 silicon version
+
+.. code-block:: bash
+
+ $ cp firmware-ele-imx-2.0.2-89161a8/mx95a0-ahab-container.img $(srctree)
+
+i.MX95 B0 silicon version
+
+.. code-block:: bash
+
$ cp firmware-ele-imx-2.0.2-89161a8/mx95b0-ahab-container.img $(srctree)
Get DDR PHY Firmware Images
@@ -53,12 +64,24 @@ branch: master
$ export TOOLS=$PWD
$ git clone -b master https://github.com/nxp-imx/imx-oei.git
$ cd imx-oei
- $ make board=mx95lp5 oei=ddr DEBUG=1
+
+i.MX95 A0 silicon version
+
+.. code-block:: bash
+
+ $ make board=mx95lp5 oei=ddr DEBUG=1 r=A0 DDR_CONFIG=XIMX95LPD5EVK19_6400mbps_train_timing_a1 all
$ cp build/mx95lp5/ddr/oei-m33-ddr.bin $(srctree)
- $ make board=mx95lp5 oei=tcm DEBUG=1
+ $ make board=mx95lp5 oei=tcm DEBUG=1 r=A0 all
$ cp build/mx95lp5/tcm/oei-m33-tcm.bin $(srctree)
+i.MX95 B0 silicon version
+
+.. code-block:: bash
+
+ $ make board=mx95lp5 oei=ddr DEBUG=1 r=B0 all
+ $ cp build/mx95lp5/ddr/oei-m33-ddr.bin $(srctree)
+
Get and Build System Manager Image
--------------------------------------
@@ -82,13 +105,14 @@ Get and Build the ARM Trusted Firmware
Note: srctree is U-Boot source directory
Get ATF from: https://github.com/nxp-imx/imx-atf/
-branch: lf_v2.10
+branch: lf_v2.12
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-poky-linux-
$ unset LDFLAGS
- $ git clone -b lf_v2.10 https://github.com/nxp-imx/imx-atf.git
+ $ unset AS
+ $ git clone -b lf_v2.12 https://github.com/nxp-imx/imx-atf.git
$ cd imx-atf
$ make PLAT=imx95 bl31
$ cp build/imx95/release/bl31.bin $(srctree)
@@ -96,6 +120,16 @@ branch: lf_v2.10
Build the Bootloader Image
--------------------------
+i.MX95 A0 silicon version
+
+.. code-block:: bash
+
+ $ export CROSS_COMPILE=aarch64-poky-linux-
+ $ make imx95_a0_19x19_evk_defconfig
+ $ make
+
+i.MX95 B0 silicon version
+
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-poky-linux-
diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst
index daf73e207d4..ebe92b6f189 100644
--- a/doc/develop/release_cycle.rst
+++ b/doc/develop/release_cycle.rst
@@ -79,7 +79,7 @@ For the next scheduled release, release candidates were made on::
* U-Boot |next_ver|-rc4 was released on Mon 08 September 2025.
-.. * U-Boot |next_ver|-rc5 was released on Mon 22 September 2025.
+* U-Boot |next_ver|-rc5 was released on Tue 23 September 2025.
Please note that the following dates are planned only and may be deviated from
as needed.
diff --git a/drivers/clk/stm32/clk-stm32-core.c b/drivers/clk/stm32/clk-stm32-core.c
index a0ae89d0912..858f122db1a 100644
--- a/drivers/clk/stm32/clk-stm32-core.c
+++ b/drivers/clk/stm32/clk-stm32-core.c
@@ -309,7 +309,7 @@ clk_stm32_register_composite(struct udevice *dev,
gate_ops = &clk_stm32_gate_ops;
}
- clk = clk_register_composite(NULL, cfg->name,
+ clk = clk_register_composite(dev, cfg->name,
parent_names, num_parents,
mux_clk, mux_ops,
div_clk, div_ops,
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index 723265ab2e5..01824310995 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -2327,7 +2327,7 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata)
{
struct udma_dev *ud = dev_get_priv(dma->dev);
struct cppi5_host_desc_t *desc_tx;
- dma_addr_t dma_src = (dma_addr_t)src;
+ dma_addr_t dma_src = (uintptr_t)src;
struct ti_udma_drv_packet_data packet_data = { 0 };
dma_addr_t paddr;
struct udma_chan *uc;
@@ -2426,7 +2426,7 @@ static int udma_receive(struct dma *dma, void **dst, void *metadata)
cppi5_desc_get_tags_ids(&desc_rx->hdr, &port_id, NULL);
- *dst = (void *)buf_dma;
+ *dst = (void *)(uintptr_t)buf_dma;
uc->num_rx_bufs--;
return pkt_len;
@@ -2518,7 +2518,7 @@ int udma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size)
desc_num = uc->desc_rx_cur % UDMA_RX_DESC_NUM;
desc_rx = uc->desc_rx + (desc_num * uc->config.hdesc_size);
- dma_dst = (dma_addr_t)dst;
+ dma_dst = (uintptr_t)dst;
cppi5_hdesc_reset_hbdesc(desc_rx);
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 2b7f5e5ed7b..e76601a5545 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -202,7 +202,7 @@ config RENESAS_RPC_HF
config HBMC_AM654
bool "HyperBus controller driver for AM65x SoC"
- depends on MULTIPLEXER && MUX_MMIO
+ depends on MULTIPLEXER && (MUX_MMIO || SPL_MUX_MMIO)
help
This is the driver for HyperBus controller on TI's AM65x and
other SoCs
diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index 7a28f2a3e83..57ac528ebf5 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -137,13 +137,15 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
const bool eth_ref_clk_sel = dev_read_bool(dev, "st,eth-ref-clk-sel");
/* SoC is STM32MP13xx with two ethernet MACs */
const bool is_mp13 = device_is_compatible(dev, "st,stm32mp13-dwmac");
+ /* SoC is STM32MP25xx with two ethernet MACs */
+ const bool is_mp2 = device_is_compatible(dev, "st,stm32mp25-dwmac");
/* Gigabit Ethernet 125MHz clock selection. */
const bool eth_clk_sel = dev_read_bool(dev, "st,eth-clk-sel");
/* Ethernet clock source is RCC. */
const bool ext_phyclk = dev_read_bool(dev, "st,ext-phyclk");
struct regmap *regmap;
u32 regmap_mask;
- u32 value;
+ u32 reg, value;
regmap = syscon_regmap_lookup_by_phandle(dev, "st,syscon");
if (IS_ERR(regmap))
@@ -163,7 +165,7 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
* acts as a selector between 0:GMII and 1:MII. As STM32MP13xx
* supports only MII, ETH_SELMII is not present.
*/
- if (!is_mp13) /* Select MII mode on STM32MP15xx */
+ if (!is_mp13 && !is_mp2) /* Select MII mode on STM32MP15xx */
value |= SYSCFG_PMCSETR_ETH_SELMII;
break;
case PHY_INTERFACE_MODE_GMII: /* STM32MP15xx only */
@@ -213,15 +215,39 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
return -EINVAL;
}
- /* Shift value at correct ethernet MAC offset in SYSCFG_PMCSETR */
- value <<= ffs(regmap_mask) - ffs(SYSCFG_PMCSETR_ETH1_MASK);
+ if (is_mp2) {
+ /*
+ * STM32MP25xx SYSCFG EthernetN control register
+ * has ETHn_CLK_SEL and ETHn_REF_CLK_SEL bits
+ * swapped, swizzle them back in place. Bitfield
+ * ETHn_SEL is shifted by 1 right, fix this up.
+ */
+ value = ((value & SYSCFG_PMCSETR_ETH_SEL_MASK) >> 1) |
+ ((value & SYSCFG_PMCSETR_ETH_CLK_SEL) << 1) |
+ ((value & SYSCFG_PMCSETR_ETH_REF_CLK_SEL) >> 1);
+
+ /*
+ * STM32MP25xx SYSCFG EthernetN control register
+ * bits always start at bit shift 0 and there is
+ * one register for each MAC, shift the register
+ * content in place.
+ */
+ value >>= ffs(SYSCFG_PMCSETR_ETH1_MASK) - 1;
+
+ reg = dev_read_u32_index_default(dev, "st,syscon", 1, 0);
- /* Update PMCCLRR (clear register) */
- regmap_write(regmap, is_mp13 ?
- SYSCFG_PMCCLRR_MP13 : SYSCFG_PMCCLRR_MP15,
- regmap_mask);
+ return regmap_write(regmap, reg, value);
+ } else {
+ /* Shift value at correct ethernet MAC offset in SYSCFG_PMCSETR */
+ value <<= ffs(regmap_mask) - ffs(SYSCFG_PMCSETR_ETH1_MASK);
- return regmap_update_bits(regmap, SYSCFG_PMCSETR, regmap_mask, value);
+ /* Update PMCCLRR (clear register) */
+ regmap_write(regmap, is_mp13 ?
+ SYSCFG_PMCCLRR_MP13 : SYSCFG_PMCCLRR_MP15,
+ regmap_mask);
+
+ return regmap_update_bits(regmap, SYSCFG_PMCSETR, regmap_mask, value);
+ }
}
static int eqos_probe_resources_stm32(struct udevice *dev)
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 531f0b522af..c656cbe25ce 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -380,7 +380,7 @@ static int dwc3_ep0_handle_status(struct dwc3 *dwc,
dep = dwc->eps[0];
dwc->ep0_usb_req.dep = dep;
dwc->ep0_usb_req.request.length = sizeof(*response_pkt);
- dwc->ep0_usb_req.request.buf = (void *)dwc->setup_buf_addr;
+ dwc->ep0_usb_req.request.buf = (void *)(uintptr_t)dwc->setup_buf_addr;
dwc->ep0_usb_req.request.complete = dwc3_ep0_status_cmpl;
return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
@@ -662,7 +662,7 @@ static int dwc3_ep0_set_sel(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
dep = dwc->eps[0];
dwc->ep0_usb_req.dep = dep;
dwc->ep0_usb_req.request.length = dep->endpoint.maxpacket;
- dwc->ep0_usb_req.request.buf = (void *)dwc->setup_buf_addr;
+ dwc->ep0_usb_req.request.buf = (void *)(uintptr_t)dwc->setup_buf_addr;
dwc->ep0_usb_req.request.complete = dwc3_ep0_set_sel_cmpl;
return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
diff --git a/env/Kconfig b/env/Kconfig
index 03c189b7266..adea277470f 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -635,7 +635,7 @@ config ENV_OFFSET_REDUND
config ENV_OFFSET_REDUND_RELATIVE_END
bool "Offset is relative to the end of the partition"
- depends on SYS_REDUNDAND_ENVIRONMENT
+ depends on ENV_REDUNDANT
depends on ENV_IS_IN_MMC
help
Treat the redundant environment offset as relative to the end of the
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 12a39d070e4..8922d6cd070 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1689,6 +1689,18 @@ together. See imx95_evk.rst for how to get DDR PHY Firmware Images.
+.. _etype_nxp_imx9image:
+
+Entry: nxp_imx9image: data file generator and mkimage invocation
+-----------------------------------------------------------------------------
+
+This entry is used to generate a data file that is passed to mkimage with the -n
+option. Each line in this data file represents a command defined in the enum
+imx8image_cmd. The imx8image_copy_image() function parses all commands and
+constructs a .bin file accordingly.
+
+
+
.. _etype_opensbi:
Entry: opensbi: RISC-V OpenSBI fw_dynamic blob
diff --git a/tools/binman/etype/nxp_imx9image.py b/tools/binman/etype/nxp_imx9image.py
new file mode 100644
index 00000000000..e0e806f2b7f
--- /dev/null
+++ b/tools/binman/etype/nxp_imx9image.py
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2025 NXP
+
+import os
+from binman.etype.mkimage import Entry_mkimage
+from dtoc import fdt_util
+from u_boot_pylib import tools
+
+class Entry_nxp_imx9image(Entry_mkimage):
+ """NXP i.MX9 .bin configuration file generator and mkimage invocation
+
+ Properties arguments:
+ - append: appends the specified blob file as-is
+ - boot-from: indicates the boot device to be used
+ - cntr-version: sets the image container format version
+ - container: indicates that it is a new container
+ - dummy-ddr: specifies the memory address for storing the DDR training
+ data image
+ - dummy-v2x: specifies the memory address for storing V2X firmware
+ - hold: reserves a specified number of bytes after the previous image
+ - image: defines the option type, image filename, and the memory address
+ where the image will be stored
+ - soc-type: specifies the target SoC for which the .bin file is generated
+ """
+
+ def __init__(self, section, etype, node):
+ super().__init__(section, etype, node)
+ self.config_filename = None
+
+ def ReadNode(self):
+ super().ReadNode()
+ cfg_path = fdt_util.GetString(self._node, 'cfg-path')
+ self.config_filename = tools.get_output_filename(cfg_path)
+ accepted_keys = [
+ 'append', 'boot-from', 'cntr-version', 'container', 'dummy-ddr',
+ 'dummy-v2x', 'hold', 'image', 'soc-type'
+ ]
+ external_files = ['oei-m33-tcm.bin', 'm33_image.bin', 'bl31.bin']
+
+ with open(self.config_filename, 'w', encoding='utf-8') as f:
+ for prop in self._node.props.values():
+ key = prop.name
+ value = prop.value
+
+ if not any(key.startswith(prefix) for prefix in accepted_keys):
+ continue
+
+ formatted_key = key.replace('-', '_')
+
+ if key.startswith('image') and isinstance(value, list) and len(value) == 3:
+ file = value[1]
+ image_path = os.path.join(tools.get_output_dir(), value[1])
+ value[1] = image_path
+ combined = ' '.join(map(str, value))
+
+ if file in external_files and not os.path.exists(value[1]):
+ print(f"file '{image_path}' does not exist. flash.bin may be not-functional.")
+ else:
+ f.write(f'image {combined}\n')
+ elif isinstance(value, str):
+ if key.startswith('append'):
+ file_path = os.path.join(tools.get_output_dir(), value)
+ if os.path.exists(file_path):
+ f.write(f'append {file_path}\n')
+ else:
+ print(f"file '{file_path}' does not exist. flash.bin may be not-functional.")
+ else:
+ f.write(f'{formatted_key} {value}\n')
+ elif isinstance(value, bool):
+ f.write(f'{formatted_key}\n')
+ elif isinstance(value, bytes):
+ hex_value = hex(int.from_bytes(value, byteorder='big'))
+ f.write(f'{formatted_key} {hex_value}\n')
+
+ def BuildSectionData(self, required):
+ data, input_fname, uniq = self.collect_contents_to_file(self._entries.values(), 'imx9image')
+
+ outfile = f'imx9image-out.{uniq}'
+ output_fname = tools.get_output_filename(outfile)
+
+ args = [
+ '-d', input_fname, '-n', self.config_filename, '-T', 'imx8image',
+ output_fname
+ ]
+
+ result = self.mkimage.run_cmd(*args)
+ if result is not None and os.path.exists(output_fname):
+ return tools.read_file(output_fname)
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index a90db3c9351..925c39a530e 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -7906,6 +7906,17 @@ fdt fdtmap Extract the devicetree blob from the fdtmap
len(IMX_LPDDR_DMEM_DATA).to_bytes(4, 'little') +
IMX_LPDDR_IMEM_DATA + IMX_LPDDR_DMEM_DATA, data)
+ def testNxpImx9Image(self):
+ """Test that binman can generate a .bin file"""
+ testdir = tempfile.mkdtemp(prefix='binman.')
+ image_path = os.path.join(testdir, 'image.bin')
+ with open(image_path, 'w') as f:
+ pass
+ container_path = os.path.join(testdir, 'mx95b0-ahab-container.img')
+ with open(container_path, 'w') as f:
+ f.write(bytes([0x87]).decode('latin1') * 32768)
+ self._DoTestFile('350_nxp_imx95.dts', output_dir=testdir)
+
def testFitSignSimple(self):
"""Test that image with FIT and signature nodes can be signed"""
if not elf.ELF_TOOLS:
diff --git a/tools/binman/test/350_nxp_imx95.dts b/tools/binman/test/350_nxp_imx95.dts
new file mode 100644
index 00000000000..3fc2de44b4a
--- /dev/null
+++ b/tools/binman/test/350_nxp_imx95.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ u-boot {
+ type = "nxp-imx9image";
+ cfg-path = "u-boot-container.cfgout";
+ args;
+
+ cntr-version = <2>;
+ boot-from = "sd";
+ soc-type = "IMX9";
+ append0 = "mx95b0-ahab-container.img";
+ append1 = "container.img";
+ container;
+ image0 = "a55", "bl31.bin", "0x8a200000";
+ image1 = "a55", "image.bin", "0x90200000";
+ };
+ };
+};