diff options
| author | Steve Kipisz <[email protected]> | 2015-02-11 18:54:28 -0500 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2015-02-16 12:41:40 -0500 |
| commit | bba379d498b4ed408e79f7aec6dc23a3572c37e7 (patch) | |
| tree | 764410f3a6a151b10f8fc7d076bc9bd3c325b54c | |
| parent | 1860d101964d6ea77e5411e62e3b42a64dc94865 (diff) | |
clock_am43xx:Set the MAC clock to /5 for OPP100
When EMAC is in the boot order, the boot ROM sets OPP50 and the
MAC clock is set to /2. SPL needs to change it to /5 for Ethernet
to generate the correct txclk. This patch sets it correctly.
Signed-off-by: Steve Kipisz <[email protected]>
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 3 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/cpu.h | 2 |
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 31188c85bcc..529a1195140 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -118,4 +118,7 @@ void enable_basic_clocks(void) /* Select the Master osc clk as Timer2 clock source */ writel(0x1, &cmdpll->clktimer2clk); + + /* For OPP100 the mac clock should be /5. */ + writel(0x4, &cmdpll->clkselmacclk); } diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index b94b56cba73..523d22eb87d 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -400,6 +400,8 @@ struct prm_device_inst { struct cm_dpll { unsigned int resv1; unsigned int clktimer2clk; /* offset 0x04 */ + unsigned int resv2[11]; + unsigned int clkselmacclk; /* offset 0x34 */ }; #endif /* CONFIG_AM43XX */ |