diff options
| author | Tom Rini <[email protected]> | 2023-05-16 09:10:57 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2023-05-16 09:10:57 -0400 |
| commit | c21fc9e1529e22c7acffe9bec7c0500ea15559dc (patch) | |
| tree | a1a7e4a36ef510fa11f295839df9a14f7fb76fb1 | |
| parent | c9b2a789281c76d3710036455d0524a1ac997f66 (diff) | |
| parent | 3f71daa16bf39561984dfbab9b1047e180c9e8ea (diff) | |
Merge tag 'xilinx-for-v2023.07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2023.07-rc3
.mailmap
- Fix Xilinx IDs
ZynqMP:
- Fix R5 split boot mode
- DT fixes - sync with Linux
Xilinx:
- Enable virtio and RNG support
- Enable ADI ethernet phy
SPI/Zynq:
- Fix dummy byte calculation
| -rw-r--r-- | .mailmap | 81 | ||||
| -rw-r--r-- | arch/arm/dts/zynq-dlc20-rev1.0.dts | 2 | ||||
| -rw-r--r-- | arch/arm/dts/zynq-microzed.dts | 44 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-sm-k26-revA.dts | 2 | ||||
| -rw-r--r-- | arch/arm/mach-zynqmp/mp.c | 28 | ||||
| -rw-r--r-- | configs/xilinx_versal_net_virt_defconfig | 5 | ||||
| -rw-r--r-- | configs/xilinx_versal_virt_defconfig | 6 | ||||
| -rw-r--r-- | configs/xilinx_zynqmp_virt_defconfig | 5 | ||||
| -rw-r--r-- | drivers/spi/zynq_qspi.c | 10 |
9 files changed, 139 insertions, 44 deletions
@@ -17,66 +17,115 @@ Alexander Graf <[email protected]> <[email protected]> Allen Martin <[email protected]> +Amanda Baze <[email protected]> <[email protected]> +Amit Kumar Mahapatra <[email protected]> <[email protected]> Andreas Bießmann <[email protected]> Andreas Bießmann <[email protected]> Aneesh V <[email protected]> Anup Patel <[email protected]> <[email protected]> +Anurag Kumar Vulisha <[email protected]> <[email protected]> +Appana Durga Kedareswara rao <[email protected]> <[email protected]> +Ashok Reddy Soma <[email protected]> <[email protected]> Atish Patra <[email protected]> <[email protected]> +Bharat Kumar Gogada <[email protected]> <[email protected]> +Bharat Kumar Gogada <[email protected]> <[email protected]> +Bhargava Sreekantappa Gayathri <[email protected]> <[email protected]> Bin Meng <[email protected]> <[email protected]> Boris Brezillon <[email protected]> <[email protected]> Boris Brezillon <[email protected]> <[email protected]> +Christian Kohn <[email protected]> <[email protected]> Dirk Behme <[email protected]> +Durga Challa <[email protected]> <[email protected]> Eugen Hristev <[email protected]> <[email protected]> Fabio Estevam <[email protected]> +Harini Katakam <[email protected]> <[email protected]> +Harsha <[email protected]> <[email protected]> Heinrich Schuchardt <[email protected]> <[email protected]> +Ibai Erkiaga <[email protected]> <[email protected]> +Igor Opaniuk <[email protected]> <[email protected]> +Igor Opaniuk <[email protected]> <[email protected]> +Izhar Ameer Shaikh <[email protected]> <[email protected]> Jagan Teki <[email protected]> Jagan Teki <[email protected]> Jagan Teki <[email protected]> Jagan Teki <[email protected]> Jagan Teki <[email protected]> +Jay Buddhabhatti <[email protected]> <[email protected]> Jernej Skrabec <[email protected]> <[email protected]> -Igor Opaniuk <[email protected]> <[email protected]> -Igor Opaniuk <[email protected]> <[email protected]> +John Linn <[email protected]> <[email protected]> +Jyotheeswar Reddy Mutthareddyvari <[email protected]> <[email protected]> +Jyotheeswar Reddy Mutthareddyvari <[email protected]> <[email protected]> +Kalyani Akula <[email protected]> <[email protected]> +Love Kumar <[email protected]> <[email protected]> +Lukasz Majewski <[email protected]> Marek Behún <[email protected]> <[email protected]> Marek Behún <[email protected]> Marek Behun <[email protected]> Marek Vasut <[email protected]> <[email protected]> Marek Vasut <[email protected]> <[email protected]> Marek Vasut <[email protected]> <marex at denx.de> Markus Klotzbuecher <[email protected]> -Masahiro Yamada <[email protected]> <[email protected]> Masahiro Yamada <[email protected]> <[email protected]> +Masahiro Yamada <[email protected]> <[email protected]> +Michal Simek <[email protected]> <[email protected]> Michal Simek <[email protected]> <[email protected]> -Michal Simek <[email protected]> <[email protected]> -Michal Simek <[email protected]> <[email protected]> -Michal Simek <[email protected]> <[email protected]> +Michal Simek <[email protected]> <[email protected]> +Michal Simek <[email protected]> <[email protected]> +Mirza <[email protected]> +Mounika Grace Akula <[email protected]> <[email protected]> +Mubin Usman Sayyed <[email protected]> <[email protected]> +Nathalie Chan King Choy <[email protected]> <[email protected]> +Nathalie Chan King Choy <[email protected]> <[email protected]> +Nava kishore Manne <[email protected]> <[email protected]> +Neal Frager <[email protected]> <[email protected]> Neil Armstrong <[email protected]> <[email protected]> Nicolas Saenz Julienne <[email protected]> <[email protected]> Patrice Chotard <[email protected]> <[email protected]> Patrick Delaunay <[email protected]> <[email protected]> Paul Burton <[email protected]> <[email protected]> +Piyush Mehta <[email protected]> <[email protected]> Prabhakar Kushwaha <[email protected]> +Punnaiah Choudary Kalluri <[email protected]> <[email protected]> +Radhey Shyam Pandey <[email protected]> <[email protected]> Rajeshwari Shinde <[email protected]> -Ricardo Ribalda <[email protected]> <[email protected]> +Raju Kumar Pothuraju <[email protected]> <[email protected]> +Ravi Patel <[email protected]> <[email protected]> Ricardo Ribalda <[email protected]> <[email protected]> +Ricardo Ribalda <[email protected]> <[email protected]> +Rohit Visavalia <[email protected]> <[email protected]> Ruchika Gupta <[email protected]> <[email protected]> +Saeed Nowshadi <[email protected]> <[email protected]> +Sai Krishna Potthuri <[email protected]> <[email protected]> +Sai Pavan Boddu <[email protected]> <[email protected]> +Sandeep Gundlupet Raju <[email protected]> <[email protected]> Sandeep Paulraj <[email protected]> +Sandeep Reddy Ghanapuram <[email protected]> <[email protected]> Shaohui Xie <[email protected]> +Shravya Kumbham <[email protected]> <[email protected]> +Shubhrajyoti Datta <[email protected]> <[email protected]> +Siva Durga Prasad Paladugu <[email protected]> <[email protected]> +Siva Durga Prasad Paladugu <[email protected]> <[email protected]> +Srinivas Goud <[email protected]> <[email protected]> +Srinivas Neeli <[email protected]> <[email protected]> Stefan Roese <[email protected]> <stroese> Stefano Babic <[email protected]> +Stefano Stabellini <[email protected]> <[email protected]> Tom Rini <[email protected]> <[email protected]> +Tomas Thoresen <[email protected]> <[email protected]> TsiChung Liew <[email protected]> -Wolfgang Denk <[email protected]> <wdenk> -Wolfgang Denk <[email protected]> <[email protected]> -Wolfgang Denk <[email protected]> <wd@pollux.(none)> -Wolfgang Denk <[email protected]> <[email protected]> -Wolfgang Denk <[email protected]> <[email protected]> +Varalaxmi Bingi <[email protected]> <[email protected]> +Venkatesh Yadav Abbarapu <[email protected]> <[email protected]> +Vikhyat Goyal <[email protected]> <[email protected]> +Vishal Patel <[email protected]> <[email protected]> Wolfgang Denk <[email protected]> <[email protected]> Wolfgang Denk <[email protected]> <[email protected]> -Wolfgang Denk <[email protected]> <[email protected]> +Wolfgang Denk <[email protected]> <[email protected]> Wolfgang Denk <[email protected]> <wd@nyx.(none)> -York Sun <[email protected]> +Wolfgang Denk <[email protected]> <[email protected]> +Wolfgang Denk <[email protected]> <wd@pollux.(none)> +Wolfgang Denk <[email protected]> <[email protected]> +Wolfgang Denk <[email protected]> <[email protected]> +Wolfgang Denk <[email protected]> <wdenk> York Sun <[email protected]> +York Sun <[email protected]> Łukasz Majewski <[email protected]> -Lukasz Majewski <[email protected]> -Mirza <[email protected]> diff --git a/arch/arm/dts/zynq-dlc20-rev1.0.dts b/arch/arm/dts/zynq-dlc20-rev1.0.dts index cbf52c88b9a..cfe07102297 100644 --- a/arch/arm/dts/zynq-dlc20-rev1.0.dts +++ b/arch/arm/dts/zynq-dlc20-rev1.0.dts @@ -26,7 +26,7 @@ }; chosen { - bootargs = "earlyprintk"; + bootargs = "earlycon"; stdout-path = "serial0:115200n8"; }; diff --git a/arch/arm/dts/zynq-microzed.dts b/arch/arm/dts/zynq-microzed.dts index 875ee080df2..5f280f4d8ec 100644 --- a/arch/arm/dts/zynq-microzed.dts +++ b/arch/arm/dts/zynq-microzed.dts @@ -8,7 +8,7 @@ #include "zynq-7000.dtsi" / { - model = "Zynq MicroZED Board"; + model = "Avnet MicroZed board"; compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000"; aliases { @@ -19,11 +19,11 @@ memory@0 { device_type = "memory"; - reg = <0 0x40000000>; + reg = <0x0 0x40000000>; }; chosen { - bootargs = "earlyprintk"; + bootargs = "earlycon"; stdout-path = "serial0:115200n8"; }; @@ -42,11 +42,6 @@ status = "okay"; }; -&uart1 { - bootph-all; - status = "okay"; -}; - &gem0 { status = "okay"; phy-mode = "rgmii-id"; @@ -62,8 +57,41 @@ status = "okay"; }; +&uart1 { + bootph-all; + status = "okay"; +}; + &usb0 { status = "okay"; dr_mode = "host"; usb-phy = <&usb_phy0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; +}; + +&pinctrl0 { + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = <0>; + io-standard = <1>; + }; + + conf-rx { + pins = "MIO29", "MIO31", "MIO36"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34", + "MIO35", "MIO37", "MIO38", "MIO39"; + bias-disable; + }; + }; }; diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index ed750497419..f6ed047f3d9 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -224,7 +224,7 @@ }; partition@22A0000 { label = "User"; - reg = <0x22A0000 0x1db0000>; /* 29.5 MB */ + reg = <0x22A0000 0x1d60000>; /* 29.375 MB */ }; }; }; diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c index 2891878973e..7a12f4b2b6c 100644 --- a/arch/arm/mach-zynqmp/mp.c +++ b/arch/arm/mach-zynqmp/mp.c @@ -32,7 +32,8 @@ #define ZYNQMP_CRLAPB_RST_LPD_R51_RST_MASK 0x02 #define ZYNQMP_CRLAPB_CPU_R5_CTRL_CLKACT_MASK 0x1000000 -#define ZYNQMP_TCM_START_ADDRESS 0xFFE00000 +#define ZYNQMP_R5_0_TCM_START_ADDR 0xFFE00000 +#define ZYNQMP_R5_1_TCM_START_ADDR 0xFFE90000 #define ZYNQMP_TCM_BOTH_SIZE 0x40000 #define ZYNQMP_CORE_APU0 0 @@ -215,9 +216,14 @@ static void set_r5_start(u8 high) writel(tmp, &rpu_base->rpu1_cfg); } -static void write_tcm_boot_trampoline(u32 boot_addr) +static void write_tcm_boot_trampoline(u32 nr, u32 boot_addr) { if (boot_addr) { + u64 tcm_start_addr = ZYNQMP_R5_0_TCM_START_ADDR; + + if (nr == ZYNQMP_CORE_RPU1) + tcm_start_addr = ZYNQMP_R5_1_TCM_START_ADDR; + /* * Boot trampoline is simple ASM code below. * @@ -229,12 +235,12 @@ static void write_tcm_boot_trampoline(u32 boot_addr) * bx r1 */ debug("Write boot trampoline for %x\n", boot_addr); - writel(0xea000000, ZYNQMP_TCM_START_ADDRESS); - writel(boot_addr, ZYNQMP_TCM_START_ADDRESS + 0x4); - writel(0xe59f0004, ZYNQMP_TCM_START_ADDRESS + 0x8); - writel(0xe5901000, ZYNQMP_TCM_START_ADDRESS + 0xc); - writel(0xe12fff11, ZYNQMP_TCM_START_ADDRESS + 0x10); - writel(0x00000004, ZYNQMP_TCM_START_ADDRESS + 0x14); // address for + writel(0xea000000, tcm_start_addr); + writel(boot_addr, tcm_start_addr + 0x4); + writel(0xe59f0004, tcm_start_addr + 0x8); + writel(0xe5901000, tcm_start_addr + 0xc); + writel(0xe12fff11, tcm_start_addr + 0x10); + writel(0x00000004, tcm_start_addr + 0x14); } } @@ -247,8 +253,10 @@ void initialize_tcm(bool mode) release_r5_reset(ZYNQMP_CORE_RPU0, LOCK); } else { set_r5_tcm_mode(SPLIT); + set_r5_halt_mode(ZYNQMP_CORE_RPU0, HALT, SPLIT); set_r5_halt_mode(ZYNQMP_CORE_RPU1, HALT, SPLIT); enable_clock_r5(); + release_r5_reset(ZYNQMP_CORE_RPU0, SPLIT); release_r5_reset(ZYNQMP_CORE_RPU1, SPLIT); } } @@ -326,7 +334,7 @@ int cpu_release(u32 nr, int argc, char *const argv[]) enable_clock_r5(); release_r5_reset(nr, LOCK); dcache_disable(); - write_tcm_boot_trampoline(boot_addr_uniq); + write_tcm_boot_trampoline(nr, boot_addr_uniq); dcache_enable(); set_r5_halt_mode(nr, RELEASE, LOCK); mark_r5_used(nr, LOCK); @@ -339,7 +347,7 @@ int cpu_release(u32 nr, int argc, char *const argv[]) enable_clock_r5(); release_r5_reset(nr, SPLIT); dcache_disable(); - write_tcm_boot_trampoline(boot_addr_uniq); + write_tcm_boot_trampoline(nr, boot_addr_uniq); dcache_enable(); set_r5_halt_mode(nr, RELEASE, SPLIT); mark_r5_used(nr, SPLIT); diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index fb8f86cd697..97904bdec0a 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -48,6 +48,7 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y CONFIG_CMD_EXT4_WRITE=y @@ -109,6 +110,7 @@ CONFIG_ZYNQ_GEM=y CONFIG_POWER_DOMAIN=y CONFIG_ZYNQMP_POWER_DOMAIN=y CONFIG_RESET_ZYNQMP=y +CONFIG_DM_RNG=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y CONFIG_XILINX_UARTLITE=y @@ -134,3 +136,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x03FD CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 86cfbd6f4f5..a1feafc49b9 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -48,6 +48,7 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y CONFIG_CMD_EXT4_WRITE=y @@ -98,6 +99,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_ADIN=y CONFIG_PHY_MARVELL=y CONFIG_PHY_NATSEMI=y CONFIG_PHY_REALTEK=y @@ -112,6 +114,7 @@ CONFIG_ZYNQ_GEM=y CONFIG_POWER_DOMAIN=y CONFIG_ZYNQMP_POWER_DOMAIN=y CONFIG_RESET_ZYNQMP=y +CONFIG_DM_RNG=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y CONFIG_XILINX_UARTLITE=y @@ -138,3 +141,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x03FD CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index e1b241f8434..c4bbde22067 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -91,6 +91,7 @@ CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_RTC=y CONFIG_CMD_TIME=y CONFIG_CMD_GETTIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_SMC=y @@ -171,6 +172,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_ADIN=y CONFIG_PHY_MARVELL=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y @@ -230,6 +232,9 @@ CONFIG_SPLASH_SCREEN=y CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y CONFIG_PANIC_HANG=y CONFIG_TPM=y CONFIG_SPL_GZIP=y diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index 00e3ffcd1df..d1d40489665 100644 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -676,7 +676,6 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) { int op_len, pos = 0, ret, i; - u32 dummy_bytes = 0; unsigned int flag = 0; const u8 *tx_buf = NULL; u8 *rx_buf = NULL; @@ -689,11 +688,6 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, } op_len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes; - if (op->dummy.nbytes) { - op_len = op->cmd.nbytes + op->addr.nbytes + - op->dummy.nbytes / op->dummy.buswidth; - dummy_bytes = op->dummy.nbytes / op->dummy.buswidth; - } u8 op_buf[op_len]; @@ -707,8 +701,8 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, pos += op->addr.nbytes; } - if (dummy_bytes) - memset(op_buf + pos, 0xff, dummy_bytes); + if (op->dummy.nbytes) + memset(op_buf + pos, 0xff, op->dummy.nbytes); /* 1st transfer: opcode + address + dummy cycles */ /* Make sure to set END bit if no tx or rx data messages follow */ |
