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authorJonas Karlman <[email protected]>2026-01-08 13:32:29 +0000
committerTom Rini <[email protected]>2026-03-10 10:07:02 -0600
commitc501d837426992e69f87cd7e6505be53c9216e05 (patch)
tree04af7960bbc3210d53f07fbd5a0cb6b470531fa2
parent492e00e27c32c32e66461d11697b205c7be1c382 (diff)
rockchip: rk3576: Allow pmu sram access for non-secure masters
The firewall block access to pmu sram for non-secure masters by default after reset (0xffffbfff). Change the pmu lookup configuration to match the default lookup config for ddr and system sram (0xffff3fff) to allow loading TF-A using DMA. Mainline TF-A will re-configure the firewall to use an even less restrictive lookup (0xbffe3ff0), so this change is not expected to have any real security implication. Signed-off-by: Jonas Karlman <[email protected]> Tested-by: Alexey Charkov <[email protected]> # UFS Reviewed-by: Kever Yang <[email protected]>
-rw-r--r--arch/arm/mach-rockchip/rk3576/rk3576.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c
index a1e8a7572fa..c17ba418ced 100644
--- a/arch/arm/mach-rockchip/rk3576/rk3576.c
+++ b/arch/arm/mach-rockchip/rk3576/rk3576.c
@@ -26,6 +26,9 @@
#define SYS_SGRF_SOC_CON15 0x005C
#define SYS_SGRF_SOC_CON20 0x0070
+#define FW_PMU1SGRF_BASE 0x26003000
+#define PMU1SGRF_SLV_LOOKUP0 0x80
+
#define FW_SYS_SGRF_BASE 0x26005000
#define SGRF_DOMAIN_CON1 0x4
#define SGRF_DOMAIN_CON2 0x8
@@ -140,6 +143,9 @@ int arch_cpu_init(void)
if (!IS_ENABLED(CONFIG_SPL_BUILD))
return 0;
+ /* Allow pmu sram access for non-secure masters */
+ writel(0xffff3fff, FW_PMU1SGRF_BASE + PMU1SGRF_SLV_LOOKUP0);
+
/* Set the emmc to access ddr memory */
val = readl(FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON2);
writel(val | 0x7, FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON2);