diff options
| author | Eric Nelson <[email protected]> | 2016-10-28 10:13:57 -0700 |
|---|---|---|
| committer | Stefano Babic <[email protected]> | 2016-11-29 16:38:10 +0100 |
| commit | c8c35155082d11deb7a2f9ccb99b11216cbd9d55 (patch) | |
| tree | 63c6f9e1bdaf089a1544c4bb85b87f8b6e110085 | |
| parent | e5491f3ef5aa4b38067bd10dbdded9520305670f (diff) | |
imx: mx6: ddr: add register MPZQLP2CTL for LPDDR2
Add constants for the MPZQLP2CTL DDR register for both
banks to allow setting the LPDDR2 timing values in
.cfg files using a named constant instead of hex addresses
as is currently done in mx6slevk and other board files.
Signed-off-by: Eric Nelson <[email protected]>
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h index 99224091baa..53eb5fa9b08 100644 --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h @@ -495,6 +495,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *, #define MX6_MMDC_P0_MPDGCTRL1 0x021b0840 #define MX6_MMDC_P0_MPRDDLCTL 0x021b0848 #define MX6_MMDC_P0_MPWRDLCTL 0x021b0850 +#define MX6_MMDC_P0_MPZQLP2CTL 0x021b085C #define MX6_MMDC_P0_MPMUR0 0x021b08b8 #define MX6_MMDC_P1_MDCTL 0x021b4000 @@ -522,6 +523,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *, #define MX6_MMDC_P1_MPDGCTRL1 0x021b4840 #define MX6_MMDC_P1_MPRDDLCTL 0x021b4848 #define MX6_MMDC_P1_MPWRDLCTL 0x021b4850 +#define MX6_MMDC_P1_MPZQLP2CTL 0x021b485C #define MX6_MMDC_P1_MPMUR0 0x021b48b8 #endif /*__ASM_ARCH_MX6_DDR_H__ */ |