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authorYe Li <[email protected]>2022-04-06 14:30:17 +0800
committerStefano Babic <[email protected]>2022-04-12 17:33:56 +0200
commitc916fb1747e33da7e89b5c683045861e37534c80 (patch)
tree3c21c85e47a65d4132d1ac54d8e88fd44503894d
parent043d11a459dca142fed9f081e03295701aedaca4 (diff)
imx: imx8ulp: Change LPAV assignment for dual boot
Assign the LPAV owner to RTD, and assign LPAV masters and peripherals to APD. So except the masters and peripherals, other resources (like DDR, cgc2, pcc5) in LPAV won't be reset during reboot and suspend. No needs to initialize DDR again after reboot. Reviewed-by: Peng Fan <[email protected]> Signed-off-by: Ye Li <[email protected]> Signed-off-by: Peng Fan <[email protected]>
-rw-r--r--arch/arm/mach-imx/imx8ulp/soc.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index 5f0a45b356a..eb540e3881f 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -524,10 +524,10 @@ static int trdc_set_access(void)
return 0;
}
-void lpav_configure(void)
+void lpav_configure(bool lpav_to_m33)
{
- /* LPAV to APD */
- setbits_le32(SIM_SEC_BASE_ADDR + 0x44, BIT(7));
+ if (!lpav_to_m33)
+ setbits_le32(SIM_SEC_BASE_ADDR + 0x44, BIT(7)); /* LPAV to APD */
/* PXP/GPU 2D/3D/DCNANO/MIPI_DSI/EPDC/HIFI4 to APD */
setbits_le32(SIM_SEC_BASE_ADDR + 0x4c, 0x7F);
@@ -584,8 +584,9 @@ int arch_cpu_init(void)
release_rdc(RDC_TRDC);
trdc_set_access();
-
- lpav_configure();
+ lpav_configure(false);
+ } else {
+ lpav_configure(true);
}
/* Release xrdc, then allow A35 to write SRAM2 */