diff options
| author | Kaustabh Chakraborty <[email protected]> | 2025-10-23 02:32:57 +0530 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-11-06 08:19:19 -0600 |
| commit | c9b43591ea5c63d09310713068d9aa7a924ab983 (patch) | |
| tree | 5e21e8d37c01a85e1d9117c53fa81464aa15650f | |
| parent | 1c250e444ad3b15315ee8b0fcb3fc3acc26449e2 (diff) | |
armv8: implement workaround for broken CNTFRQ_EL0 value
In devices where the U-Boot is used as a secondary bootloader, we rely
on the device's primary bootloader to implement CNTFRQ_EL0. However,
this reliance may lead to a non-functional timer in broken firmware.
For instance, some versions of Samsung's S-Boot don't implement it. It's
also not possible to set it in the U-Boot, because it's booted in a lower
exception level. CNTFRQ_EL0 is reported to be 0.
Use gd->arch.timer_rate_hz to override the queried value if set. This
setting needs to be done in the board file, preferrably in timer_init().
This feature is present only when the CONFIG_ARMV8_CNTFRQ_BROKEN is
enabled.
Signed-off-by: Kaustabh Chakraborty <[email protected]>
| -rw-r--r-- | arch/arm/cpu/armv8/Kconfig | 8 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/generic_timer.c | 4 |
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 199335cd604..dfc4ce851c3 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -4,6 +4,14 @@ config CMO_BY_VA_ONLY bool "Force cache maintenance to be exclusively by VA" depends on !SYS_DISABLE_DCACHE_OPS +config ARMV8_CNTFRQ_BROKEN + bool "Fix broken ARMv8 generic timer" + depends on SYS_ARCH_TIMER + help + Say Y here if U-Boot depends on a prior stage bootloader, which + does not set the CNTFRQ_EL0 frequency, and its not possible to + set it from U-Boot either. + config ARMV8_SPL_EXCEPTION_VECTORS bool "Install crash dump exception vectors" depends on SPL diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c index 1de7ec596fc..744ab3b91e5 100644 --- a/arch/arm/cpu/armv8/generic_timer.c +++ b/arch/arm/cpu/armv8/generic_timer.c @@ -19,6 +19,10 @@ DECLARE_GLOBAL_DATA_PTR; unsigned long notrace get_tbclk(void) { unsigned long cntfrq; + + if (IS_ENABLED(CONFIG_ARMV8_CNTFRQ_BROKEN) && gd->arch.timer_rate_hz) + return gd->arch.timer_rate_hz; + asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq)); return cntfrq; } |