diff options
| author | Michal Simek <[email protected]> | 2026-06-11 14:10:25 +0200 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2026-07-08 08:55:51 +0200 |
| commit | cea8f9407c538e7b3a590d718180864596fc4110 (patch) | |
| tree | b90c9aaf8dffadbe12b92fe9c740e4a3e742de7a | |
| parent | d6e7db8f11fde6d79c5e9b5a41ba8a9625b113a8 (diff) | |
arm64: versal2: Drop static DDR MMU mappings
DDR coverage is already populated later from the DRAM banks discovered by
mem_map_fill(). Drop the stale static mappings so the MMU table matches
address map more closely.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/156e48d8228acfeba8866618038b48cd51490ea7.1781179823.git.michal.simek@amd.com
| -rw-r--r-- | arch/arm/mach-versal2/cpu.c | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/arch/arm/mach-versal2/cpu.c b/arch/arm/mach-versal2/cpu.c index f65c231bdab..d66109abd78 100644 --- a/arch/arm/mach-versal2/cpu.c +++ b/arch/arm/mach-versal2/cpu.c @@ -19,9 +19,9 @@ DECLARE_GLOBAL_DATA_PTR; #if CONFIG_IS_ENABLED(PCIE_DW_AMD) -#define VERSAL2_MEM_MAP_USED 6 +#define VERSAL2_MEM_MAP_USED 4 #else -#define VERSAL2_MEM_MAP_USED 5 +#define VERSAL2_MEM_MAP_USED 3 #endif #define DRAM_BANKS CONFIG_NR_DRAM_BANKS @@ -51,19 +51,6 @@ static struct mm_region versal2_mem_map[VERSAL2_MEM_MAP_MAX] = { .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, { - .virt = 0x600000000UL, - .phys = 0x600000000UL, - .size = 0x800000000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, { - .virt = 0xe00000000UL, - .phys = 0xe00000000UL, - .size = 0xf200000000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | - PTE_BLOCK_NON_SHARE | - PTE_BLOCK_PXN | PTE_BLOCK_UXN #if CONFIG_IS_ENABLED(PCIE_DW_AMD) }, { /* PCIe DBI (1 MB) and config space (255 MB) are contiguous */ |