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authorVincent Jardin <[email protected]>2026-07-30 00:07:36 +0200
committerPeng Fan <[email protected]>2026-08-11 15:47:52 +0800
commitd13ee7acafb93a8b8753083ee82a594da121f745 (patch)
tree11f2147ea0302380e56b80272962a6caed198e8b
parent607d45d1e3b3f0e2b2a2e23799e8b43cd52a28da (diff)
arm: dts: layerscape: drop leading zeros from unit addresses
Fix many dtc warning for the Layerscape device trees with W=1. Without this fix, it emits over 30 unit_address_format warnings. No functional change. Signed-off-by: Vincent Jardin <[email protected]> Signed-off-by: Peng Fan <[email protected]>
-rw-r--r--arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi8
-rw-r--r--arch/arm/dts/fsl-ls1028a-qds.dtsi2
-rw-r--r--arch/arm/dts/fsl-ls1088a-qds.dtsi2
-rw-r--r--arch/arm/dts/fsl-lx2160a-qds.dtsi4
-rw-r--r--arch/arm/dts/fsl-sch-28021.dtsi8
5 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
index b6522069207..529adfcbaf4 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
@@ -25,28 +25,28 @@
status = "okay";
managed = "in-band-status";
phy-mode = "qsgmii";
- phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@08}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@8}>;
};
&mscc_felix_port1 {
status = "okay";
managed = "in-band-status";
phy-mode = "qsgmii";
- phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@09}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@9}>;
};
&mscc_felix_port2 {
status = "okay";
managed = "in-band-status";
phy-mode = "qsgmii";
- phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0a}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@a}>;
};
&mscc_felix_port3 {
status = "okay";
managed = "in-band-status";
phy-mode = "qsgmii";
- phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0b}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@b}>;
};
&mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds.dtsi b/arch/arm/dts/fsl-ls1028a-qds.dtsi
index ac5b2d9dde9..92757260560 100644
--- a/arch/arm/dts/fsl-ls1028a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds.dtsi
@@ -147,7 +147,7 @@
mdio-parent-bus = <&enetc_mdio_pf3>;
/* on-board MDIO with a single RGMII PHY */
- mdio@00 {
+ mdio@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x00>;
diff --git a/arch/arm/dts/fsl-ls1088a-qds.dtsi b/arch/arm/dts/fsl-ls1088a-qds.dtsi
index 83635a2e40d..5bdc8675aa2 100644
--- a/arch/arm/dts/fsl-ls1088a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1088a-qds.dtsi
@@ -41,7 +41,7 @@
mux-reg-masks = <0x54 0xe0>; // reg 0x54, bits 7:5
mdio-parent-bus = <&emdio1>;
- mdio@00 {
+ mdio@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x00>;
diff --git a/arch/arm/dts/fsl-lx2160a-qds.dtsi b/arch/arm/dts/fsl-lx2160a-qds.dtsi
index 6fa36de0622..c213088bdf0 100644
--- a/arch/arm/dts/fsl-lx2160a-qds.dtsi
+++ b/arch/arm/dts/fsl-lx2160a-qds.dtsi
@@ -161,7 +161,7 @@
mux-reg-masks = <0x54 0xf8>; // reg 0x54, bits 7:3
mdio-parent-bus = <&emdio1>;
- mdio@00 {
+ mdio@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x00>;
@@ -170,7 +170,7 @@
reg = <0x1>;
};
};
- mdio@08 {
+ mdio@8 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40>;
diff --git a/arch/arm/dts/fsl-sch-28021.dtsi b/arch/arm/dts/fsl-sch-28021.dtsi
index 61245287b96..d819308ed8c 100644
--- a/arch/arm/dts/fsl-sch-28021.dtsi
+++ b/arch/arm/dts/fsl-sch-28021.dtsi
@@ -12,18 +12,18 @@
* PHY addresses are 0x08 - 0x0b.
* On the card the first port is the top port (farthest from PEX connector).
*/
-phy@08 {
+phy@8 {
reg = <0x08>;
};
-phy@09 {
+phy@9 {
reg = <0x09>;
};
-phy@0a {
+phy@a {
reg = <0x0a>;
};
-phy@0b {
+phy@b {
reg = <0x0b>;
};