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authorPatrick Rudolph <[email protected]>2025-05-27 11:33:31 +0200
committerTom Rini <[email protected]>2025-06-02 14:58:46 -0600
commitd1555de5fa21c06118540dcd4a627a1af29bbb40 (patch)
tree7c05e68ebbd1cedcf12bf1148229898a07f21848
parentafb3ab64cb7df90a2c6fd54f1639ff3f807f1e86 (diff)
arm/dts/qemu-sbsa: Fix interrupt
Change the vcpumntirq in the GICv3 node from SPI to PPI. Prevents Linux from complaining: '[Firmware Bug]: CPU interface incapable of MMIO access' Fixes: 6d722894fd48 "board: emulation: Add QEMU sbsa support" Signed-off-by: Patrick Rudolph <[email protected]>
-rw-r--r--arch/arm/dts/qemu-sbsa.dts5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/dts/qemu-sbsa.dts b/arch/arm/dts/qemu-sbsa.dts
index 099b51b927f..a7718d6c29e 100644
--- a/arch/arm/dts/qemu-sbsa.dts
+++ b/arch/arm/dts/qemu-sbsa.dts
@@ -91,7 +91,10 @@
#interrupt-cells = <3>;
status = "okay";
interrupt-controller;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+
+ /* vcpumntirq: virtual CPU interface maintenance interrupt */
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+
reg = /bits/ 64 <SBSA_GIC_DIST_BASE_ADDR SBSA_GIC_DIST_LENGTH>,
/bits/ 64 <SBSA_GIC_REDIST_BASE_ADDR SBSA_GIC_REDIST_LENGTH>,
/bits/ 64 <0 0>,