diff options
| author | Marek Vasut <[email protected]> | 2026-03-16 00:51:59 +0100 |
|---|---|---|
| committer | Marek Vasut <[email protected]> | 2026-04-04 23:46:31 +0200 |
| commit | d8bd70741f0d0258088a306c39bf8af3c1be3c4b (patch) | |
| tree | 1205a19a81700e0fca8655334f56262c4b963c92 | |
| parent | e7b5aee706fa36f20727a59c95da6eb77c8fa8d3 (diff) | |
arm64: dts: renesas: Disable SCIF1 in Renesas R-Car X5H R8A78000 SoC DT
Disable incorrectly enabled SCIF1 in Renesas R-Car X5H R8A78000 SoC DT.
The SCIF1 should be enabled on board DT level in case it is needed, but
should be disabled in SoC DT by default. This had no adverse effect on
the currently upstream platforms, because those managed to probe only
the HSCIF0 device and SCIF1 was ignored.
Signed-off-by: Marek Vasut <[email protected]>
| -rw-r--r-- | arch/arm/dts/r8a78000.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/dts/r8a78000.dtsi b/arch/arm/dts/r8a78000.dtsi index 0d0c24503e2..89c2881fa94 100644 --- a/arch/arm/dts/r8a78000.dtsi +++ b/arch/arm/dts/r8a78000.dtsi @@ -763,7 +763,7 @@ interrupts = <GIC_SPI 4075 IRQ_TYPE_LEVEL_HIGH>; clocks = <&dummy_clk_sgasyncd16>, <&dummy_clk_sgasyncd16>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - status = "okay"; + status = "disabled"; }; scif3: serial@c0708000 { |