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authorTomasz Maciej Nowak <[email protected]>2023-03-30 20:24:22 +0200
committerThierry Reding <[email protected]>2023-06-23 13:43:48 +0200
commitda880bf7c18041e598def664c641705208359dfa (patch)
treef3c63df316d1d358b21a9dbb7a46b8f21620e2fa
parente55448c780d9052cc8cc40dc70619b28b731f4e4 (diff)
ARM: dts: trimslice: sync SPI node with Linux dts
After "spi: spi_flash_probe_bus_cs() rely on DT for spi speed and mode" series flash speed and mode wasn't passed to driver anymore, which resulted in: Loading Environment from SPIFlash... tegra20_sflash spi@7000c380: Invalid chip select 0:0 (err=-19) *** Warning - spi_flash_probe_bus_cs() failed, using default environment Fix it by syncing SPI node of affected device dts with Linux kernel dts. The changed SPI bus frequency doesn't influence stability of read/write operations. Ref: https://patchwork.ozlabs.org/project/uboot/cover/[email protected] Signed-off-by: Tomasz Maciej Nowak <[email protected]> Signed-off-by: Tom <[email protected]>
-rw-r--r--arch/arm/dts/tegra20-trimslice.dts8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/dts/tegra20-trimslice.dts b/arch/arm/dts/tegra20-trimslice.dts
index e19001ee2bd..fa942d26078 100644
--- a/arch/arm/dts/tegra20-trimslice.dts
+++ b/arch/arm/dts/tegra20-trimslice.dts
@@ -27,7 +27,13 @@
spi@7000c380 {
status = "okay";
- spi-max-frequency = <25000000>;
+ spi-max-frequency = <48000000>;
+
+ flash@0 {
+ compatible = "winbond,w25q80bl", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <48000000>;
+ };
};
pcie@80003000 {