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authorTom Rini <[email protected]>2026-05-25 09:29:54 -0600
committerTom Rini <[email protected]>2026-05-25 09:29:54 -0600
commite875c10c6f6594cf3c25f37617fadb6e38c781f2 (patch)
tree29cee508f4f5c0cba3075c983656fcb88dbd7bad
parent7e11adf05488c64195c8031299ff65c1a4fd660a (diff)
parent37e6b640ef6177b79021190e3dfab13b465bebe4 (diff)
Merge patch series "Fix speculative access to firewalled regions on AM62 SoCs"
Anshul Dalal <[email protected]> says: This patch series fixes firewall exceptions observed on AM62 family of devices due to speculative accesses made by the A53 core to secure DDR regions. Link: https://lore.kernel.org/r/[email protected]
-rw-r--r--arch/arm/cpu/armv8/cache_v8.c5
-rw-r--r--arch/arm/include/asm/armv8/mmu.h5
-rw-r--r--arch/arm/mach-k3/common.c1
3 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 39479df7b21..7c0e3f6d055 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -810,8 +810,10 @@ __weak void mmu_setup(void)
el = current_el();
set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(NULL, NULL),
MEMORY_ATTRIBUTES);
+}
- /* enable the mmu */
+void mmu_enable(void)
+{
set_sctlr(get_sctlr() | CR_M);
}
@@ -881,6 +883,7 @@ void dcache_enable(void)
if (!mmu_status()) {
__asm_invalidate_tlb_all();
mmu_setup();
+ mmu_enable();
}
/* Set up page tables only once (it is done also by mmu_setup()) */
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 8aa5f9721c4..5359b2ad87b 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -222,6 +222,11 @@ u64 get_tcr(u64 *pips, u64 *pva_bits);
* mmu_setup() - Sets up the mmu page tables as per mem_map
*/
void mmu_setup(void);
+
+/**
+ * mmu_enable() - Enable the MMU by setting 'M' bit in SCTLR register
+ */
+void mmu_enable(void);
#endif
#endif /* _ASM_ARMV8_MMU_H_ */
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index b0a75988714..19a6e24f38b 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -294,6 +294,7 @@ void enable_caches(void)
__func__, ret);
}
+ mmu_enable();
icache_enable();
dcache_enable();
}