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authorChris Morgan <[email protected]>2023-02-13 16:27:41 -0600
committerKever Yang <[email protected]>2023-02-28 18:07:27 +0800
commite92754e20cca37dcd62e195499ade25186d5f5e5 (patch)
tree5e7b6244b94646b6373cf85ea1449674575c2ff5
parent95ef2aaedc7adeb2dcb922c6525d5b3df1b198e5 (diff)
arm64: dts: rockchip: add gpio-ranges property to gpio nodes
Add gpio-ranges property to GPIO nodes so that the bank ID can be correctly derived for each GPIO bank. Signed-off-by: Chris Morgan <[email protected]> Reviewed-by: Kever Yang <[email protected]>
-rw-r--r--arch/arm/dts/rk356x.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/dts/rk356x.dtsi b/arch/arm/dts/rk356x.dtsi
index 5706c3e24f0..6492ace0de6 100644
--- a/arch/arm/dts/rk356x.dtsi
+++ b/arch/arm/dts/rk356x.dtsi
@@ -1806,6 +1806,7 @@
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1817,6 +1818,7 @@
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1828,6 +1830,7 @@
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1839,6 +1842,7 @@
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1850,6 +1854,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 128 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;