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authorRicardo Simoes <[email protected]>2025-09-17 17:59:32 +0200
committerTom Rini <[email protected]>2025-09-22 09:56:39 -0600
commitedc666f1cf721c12ebc2fc096d362f8b14004d3a (patch)
tree5a9e7be0def9c65a09f6d92d6becff7040ad1948
parent2727de799a644f4db15e8682503f783a62fa4af2 (diff)
clk: imx6q: Add definition for missing PWM clocks
Following the work done in commit 7f39ad5a ("clk: imx6q: Add definition for IMX6QDL_CLK_PWM1"), this commit adds definitions for PWM2, PWM3, and PWM4 clocks. Allowing one to use these PWM modules together with DM_CLK. Note that the solution was verified only against PWM3. Signed-off-by: Ricardo Simoes <[email protected]> Signed-off-by: Mark Jonas <[email protected]>
-rw-r--r--drivers/clk/imx/clk-imx6q.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 13239f2f64d..b69355cefc7 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -156,6 +156,12 @@ static int imx6q_clk_probe(struct udevice *dev)
imx_clk_gate2(dev, "i2c3", "ipg_per", base + 0x70, 10));
clk_dm(IMX6QDL_CLK_PWM1,
imx_clk_gate2(dev, "pwm1", "ipg_per", base + 0x78, 16));
+ clk_dm(IMX6QDL_CLK_PWM2,
+ imx_clk_gate2(dev, "pwm2", "ipg_per", base + 0x78, 18));
+ clk_dm(IMX6QDL_CLK_PWM3,
+ imx_clk_gate2(dev, "pwm3", "ipg_per", base + 0x78, 20));
+ clk_dm(IMX6QDL_CLK_PWM4,
+ imx_clk_gate2(dev, "pwm4", "ipg_per", base + 0x78, 22));
clk_dm(IMX6QDL_CLK_ENET, imx_clk_gate2(dev, "enet", "ipg", base + 0x6c, 10));
clk_dm(IMX6QDL_CLK_ENET_REF,