diff options
| author | Zixun LI <[email protected]> | 2025-11-07 16:02:23 +0100 |
|---|---|---|
| committer | Eugen Hristev <[email protected]> | 2025-11-21 10:36:11 +0200 |
| commit | ee5053adcb30f03b20dfe03456be1f0a524a4d9a (patch) | |
| tree | 02693b264e5127d2177ecdf8cf1e20602513c1f3 | |
| parent | b10c055d4e1b5153a331a61ef82a5b01b5bb4c45 (diff) | |
mtd: rawnand: atmel: set pmecc data setup time
Setup the pmecc data setup time as 3 clock cycles for 133MHz as
recommended by the datasheet.
Backported from Linux: f55f552a7c7e0a1 ("mtd: rawnand: atmel: set pmecc
data setup time")
Fixes: a490e1b7c017c ("nand: atmel: Add pmecc driver")
Signed-off-by: Zixun LI <[email protected]>
Tested-by: Alexander Dahl <[email protected]>
Reviewed-by: Eugen Hristev <[email protected]>
| -rw-r--r-- | drivers/mtd/nand/raw/atmel/pmecc.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/atmel/pmecc.c b/drivers/mtd/nand/raw/atmel/pmecc.c index e500a0fe3f8..7c4e9bd5f99 100644 --- a/drivers/mtd/nand/raw/atmel/pmecc.c +++ b/drivers/mtd/nand/raw/atmel/pmecc.c @@ -142,6 +142,7 @@ struct atmel_pmecc_caps { int nstrengths; int el_offset; bool correct_erased_chunks; + bool clk_ctrl; }; struct atmel_pmecc_user_conf_cache { @@ -840,6 +841,10 @@ atmel_pmecc_create(struct udevice *dev, pmecc->regs.timing = 0; + /* pmecc data setup time */ + if (caps->clk_ctrl) + writel(PMECC_CLK_133MHZ, pmecc->regs.base + ATMEL_PMECC_CLK); + /* Disable all interrupts before registering the PMECC handler. */ writel(0xffffffff, pmecc->regs.base + ATMEL_PMECC_IDR); atmel_pmecc_reset(pmecc); @@ -884,6 +889,7 @@ static struct atmel_pmecc_caps at91sam9g45_caps = { .strengths = atmel_pmecc_strengths, .nstrengths = 5, .el_offset = 0x8c, + .clk_ctrl = true, }; static struct atmel_pmecc_caps sama5d4_caps = { |