diff options
| author | Michal Simek <[email protected]> | 2024-01-30 15:51:06 +0100 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2024-02-12 09:28:32 +0100 |
| commit | f8e125c995384771a2dcd33d299e21ff8879e3bf (patch) | |
| tree | ddfdf213016349b87d5737239cb0d2bfdd7872fb | |
| parent | 8e9566c98118fa66d663f65b13aa5577844224b8 (diff) | |
arm64: zynqmp: Fix kr260 clock wiring
kr260 revA/revA01 is using discrete oscilator for DP (27MHz) and si5332 for
other clocks but clocks are different compare to kv260 that's why fix it to
aligned with the latest schematics.
On the other handle kr260 revB/revA03 also contains 74.25 MHz discrete
clock chip for SLVC-EC output which is not defined.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/e87ae94979c6efc909740bb1a569505042e4f876.1706626255.git.michal.simek@amd.com
| -rw-r--r-- | arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 14 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 6 |
2 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso index 39ca98a9d47..afcf8a8ee6b 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso @@ -25,16 +25,22 @@ io-channels = <&u14 0>, <&u14 1>, <&u14 2>; }; + clk_27: clock0 { /* u86 - DP */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; + clk_125: si5332-0 { /* u17 - GEM0/1 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; }; - clk_27: si5332-1 { /* u17 - DP */ + clk_74: si5332-5 { /* u17 - SLVC-EC */ compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <27000000>; + clock-frequency = <74250000>; }; clk_26: si5332-2 { /* u17 - USB */ @@ -49,13 +55,13 @@ clock-frequency = <156250000>; }; - clk_25_0: si5332-4 { /* u17 - GEM2 */ + clk_25_0: si5332-1 { /* u17 - GEM2 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; }; - clk_25_1: si5332-5 { /* u17 - GEM3 */ + clk_25_1: si5332-4 { /* u17 - GEM3 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso index 21187396326..24be5dd84e1 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso @@ -60,6 +60,12 @@ #clock-cells = <0>; clock-frequency = <25000000>; }; + + clk_74: clock6 { /* u88 - SLVC-EC */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <74250000>; + }; }; &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ |