diff options
| author | Tom Rini <[email protected]> | 2026-03-25 11:09:34 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2026-03-25 11:09:34 -0600 |
| commit | fce0358351017ab88987e40ad887670463373e7e (patch) | |
| tree | 1c132acb016978ed453a9596a4a110ec8e47988f | |
| parent | 5a36f434254f6977884eedffc2b8f3a8d70a5a34 (diff) | |
| parent | 20531fa6183e6b9426c955abf72b1e3db7687c8c (diff) | |
Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next
89 files changed, 608 insertions, 630 deletions
diff --git a/arch/arm/dts/tegra114-asus-tf701t.dts b/arch/arm/dts/tegra114-asus-tf701t.dts index 2505b9bb726..bd43a80a208 100644 --- a/arch/arm/dts/tegra114-asus-tf701t.dts +++ b/arch/arm/dts/tegra114-asus-tf701t.dts @@ -1151,7 +1151,7 @@ }; }; - sdmmc3: sdhci@78000400 { + sdmmc3: mmc@78000400 { status = "okay"; bus-width = <4>; @@ -1165,7 +1165,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra114-dalmore.dts b/arch/arm/dts/tegra114-dalmore.dts index 18bcb75fafa..48708f37246 100644 --- a/arch/arm/dts/tegra114-dalmore.dts +++ b/arch/arm/dts/tegra114-dalmore.dts @@ -16,8 +16,8 @@ i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; i2c4 = "/i2c@7000c700"; - mmc0 = "/sdhci@78000600"; - mmc1 = "/sdhci@78000400"; + mmc0 = "/mmc@78000600"; + mmc1 = "/mmc@78000400"; usb0 = "/usb@7d000000"; usb1 = "/usb@7d008000"; }; @@ -57,13 +57,13 @@ spi-max-frequency = <25000000>; }; - sdhci@78000400 { + mmc@78000400 { cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; bus-width = <4>; status = "okay"; }; - sdhci@78000600 { + mmc@78000600 { bus-width = <8>; status = "okay"; non-removable; diff --git a/arch/arm/dts/tegra114-microsoft-surface-2-common.dtsi b/arch/arm/dts/tegra114-microsoft-surface-2-common.dtsi index f8f71262538..f735f5060ce 100644 --- a/arch/arm/dts/tegra114-microsoft-surface-2-common.dtsi +++ b/arch/arm/dts/tegra114-microsoft-surface-2-common.dtsi @@ -35,7 +35,7 @@ compatible = "samsung,ltl106hl02-001"; reg = <0>; - vdd-supply = <&tps65090_fet4>; + power-supply = <&tps65090_fet4>; backlight = <&backlight>; }; @@ -814,7 +814,7 @@ }; }; - sdmmc3: sdhci@78000400 { + sdmmc3: mmc@78000400 { status = "okay"; bus-width = <4>; @@ -827,7 +827,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra114-nvidia-tegratab.dts b/arch/arm/dts/tegra114-nvidia-tegratab.dts index f65772a8e01..6ff2850b911 100644 --- a/arch/arm/dts/tegra114-nvidia-tegratab.dts +++ b/arch/arm/dts/tegra114-nvidia-tegratab.dts @@ -953,7 +953,7 @@ }; }; - sdmmc3: sdhci@78000400 { + sdmmc3: mmc@78000400 { status = "okay"; bus-width = <4>; @@ -967,7 +967,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi index 250d692f6bf..0a783fbc95d 100644 --- a/arch/arm/dts/tegra114.dtsi +++ b/arch/arm/dts/tegra114.dtsi @@ -631,7 +631,7 @@ #nvidia,mipi-calibrate-cells = <1>; }; - sdhci@78000000 { + mmc@78000000 { compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000000 0x200>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; @@ -641,7 +641,7 @@ status = "disabled"; }; - sdhci@78000200 { + mmc@78000200 { compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000200 0x200>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; @@ -651,7 +651,7 @@ status = "disabled"; }; - sdhci@78000400 { + mmc@78000400 { compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000400 0x200>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; @@ -661,7 +661,7 @@ status = "disabled"; }; - sdhci@78000600 { + mmc@78000600 { compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000600 0x200>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/dts/tegra124-apalis.dts b/arch/arm/dts/tegra124-apalis.dts index 08184ab3ac2..5ac08037a92 100644 --- a/arch/arm/dts/tegra124-apalis.dts +++ b/arch/arm/dts/tegra124-apalis.dts @@ -54,9 +54,9 @@ i2c1 = "/i2c@7000c000"; i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; - mmc0 = "/sdhci@700b0600"; - mmc1 = "/sdhci@700b0000"; - mmc2 = "/sdhci@700b0400"; + mmc0 = "/mmc@700b0600"; + mmc1 = "/mmc@700b0000"; + mmc2 = "/mmc@700b0400"; rtc0 = "/i2c@7000c000/rtc@68"; rtc1 = "/i2c@7000d000/pmic@40"; rtc2 = "/rtc@7000e000"; @@ -1958,7 +1958,7 @@ }; /* Apalis MMC1 */ - sdhci@700b0000 { + mmc@700b0000 { status = "okay"; /* MMC1_CD# */ cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>; @@ -1967,7 +1967,7 @@ }; /* Apalis SD1 */ - sdhci@700b0400 { + mmc@700b0400 { status = "okay"; /* SD1_CD# */ cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; @@ -1976,7 +1976,7 @@ }; /* eMMC */ - sdhci@700b0600 { + mmc@700b0600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra124-cei-tk1-som.dts b/arch/arm/dts/tegra124-cei-tk1-som.dts index e5b41f3183c..59901a3439b 100644 --- a/arch/arm/dts/tegra124-cei-tk1-som.dts +++ b/arch/arm/dts/tegra124-cei-tk1-som.dts @@ -16,8 +16,8 @@ i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; i2c4 = "/i2c@7000c700"; - mmc0 = "/sdhci@700b0600"; - mmc1 = "/sdhci@700b0400"; + mmc0 = "/mmc@700b0600"; + mmc1 = "/mmc@700b0400"; spi0 = "/spi@7000d400"; spi1 = "/spi@7000da00"; usb0 = "/usb@7d000000"; @@ -297,7 +297,7 @@ }; }; - sdhci@700b0400 { + mmc@700b0400 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; @@ -305,7 +305,7 @@ bus-width = <4>; }; - sdhci@700b0600 { + mmc@700b0600 { status = "okay"; bus-width = <8>; }; diff --git a/arch/arm/dts/tegra124-jetson-tk1.dts b/arch/arm/dts/tegra124-jetson-tk1.dts index 59e080a8af6..7d19a25e278 100644 --- a/arch/arm/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/dts/tegra124-jetson-tk1.dts @@ -16,8 +16,8 @@ i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; i2c4 = "/i2c@7000c700"; - mmc0 = "/sdhci@700b0600"; - mmc1 = "/sdhci@700b0400"; + mmc0 = "/mmc@700b0600"; + mmc1 = "/mmc@700b0400"; spi0 = "/spi@7000d400"; spi1 = "/spi@7000da00"; usb0 = "/usb@7d000000"; @@ -301,7 +301,7 @@ }; }; - sdhci@700b0400 { + mmc@700b0400 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; @@ -309,7 +309,7 @@ bus-width = <4>; }; - sdhci@700b0600 { + mmc@700b0600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra124-nyan-big.dts b/arch/arm/dts/tegra124-nyan-big.dts index f1c97052a84..b942d92e900 100644 --- a/arch/arm/dts/tegra124-nyan-big.dts +++ b/arch/arm/dts/tegra124-nyan-big.dts @@ -16,8 +16,8 @@ i2c5 = "/i2c@7000d100"; rtc0 = "/i2c@7000d000/pmic@40"; rtc1 = "/rtc@7000e000"; - mmc0 = "/sdhci@700b0600"; - mmc1 = "/sdhci@700b0400"; + mmc0 = "/mmc@700b0600"; + mmc1 = "/mmc@700b0400"; spi0 = "/spi@7000d400"; spi1 = "/spi@7000da00"; usb0 = "/usb@7d000000"; @@ -59,7 +59,7 @@ ddc-i2c-bus = <&dpaux>; }; - sdhci@700b0400 { /* SD Card on this bus */ + mmc@700b0400 { /* SD Card on this bus */ wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/tegra124-nyan.dtsi b/arch/arm/dts/tegra124-nyan.dtsi index 2b28fe14970..7b465c601af 100644 --- a/arch/arm/dts/tegra124-nyan.dtsi +++ b/arch/arm/dts/tegra124-nyan.dtsi @@ -370,7 +370,7 @@ reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; }; - sdhci@700b0000 { /* WiFi/BT on this bus */ + mmc@700b0000 { /* WiFi/BT on this bus */ status = "okay"; power-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>; bus-width = <4>; @@ -382,7 +382,7 @@ keep-power-in-suspend; }; - sdhci@700b0400 { /* SD Card on this bus */ + mmc@700b0400 { /* SD Card on this bus */ status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; @@ -392,7 +392,7 @@ vqmmc-supply = <&vddio_sdmmc3>; }; - sdhci@700b0600 { /* eMMC on this bus */ + mmc@700b0600 { /* eMMC on this bus */ status = "okay"; bus-width = <8>; no-1-8-v; diff --git a/arch/arm/dts/tegra124-venice2.dts b/arch/arm/dts/tegra124-venice2.dts index 7e9c6aa1839..0e855d8bc30 100644 --- a/arch/arm/dts/tegra124-venice2.dts +++ b/arch/arm/dts/tegra124-venice2.dts @@ -17,8 +17,8 @@ i2c3 = "/i2c@7000c500"; i2c4 = "/i2c@7000c700"; i2c5 = "/i2c@7000d100"; - mmc0 = "/sdhci@700b0600"; - mmc1 = "/sdhci@700b0400"; + mmc0 = "/mmc@700b0600"; + mmc1 = "/mmc@700b0400"; spi0 = "/spi@7000d400"; spi1 = "/spi@7000da00"; usb0 = "/usb@7d000000"; @@ -70,7 +70,7 @@ spi-max-frequency = <25000000>; }; - sdhci@700b0400 { + mmc@700b0400 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; @@ -78,7 +78,7 @@ bus-width = <4>; }; - sdhci@700b0600 { + mmc@700b0600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra124-xiaomi-mocha.dts b/arch/arm/dts/tegra124-xiaomi-mocha.dts index 64386f2b7b7..09b5c1eea05 100644 --- a/arch/arm/dts/tegra124-xiaomi-mocha.dts +++ b/arch/arm/dts/tegra124-xiaomi-mocha.dts @@ -476,7 +476,7 @@ }; }; - sdmmc3: sdhci@700b0400 { + sdmmc3: mmc@700b0400 { status = "okay"; bus-width = <4>; @@ -487,7 +487,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@700b0600 { + sdmmc4: mmc@700b0600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi index cac9b112302..1c62d1f6e7b 100644 --- a/arch/arm/dts/tegra124.dtsi +++ b/arch/arm/dts/tegra124.dtsi @@ -717,7 +717,7 @@ #phy-cells = <1>; }; - sdhci@700b0000 { + mmc@700b0000 { compatible = "nvidia,tegra124-sdhci"; reg = <0x700b0000 0x200>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; @@ -727,7 +727,7 @@ status = "disabled"; }; - sdhci@700b0200 { + mmc@700b0200 { compatible = "nvidia,tegra124-sdhci"; reg = <0x700b0200 0x200>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; @@ -737,7 +737,7 @@ status = "disabled"; }; - sdhci@700b0400 { + mmc@700b0400 { compatible = "nvidia,tegra124-sdhci"; reg = <0x700b0400 0x200>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; @@ -747,7 +747,7 @@ status = "disabled"; }; - sdhci@700b0600 { + mmc@700b0600 { compatible = "nvidia,tegra124-sdhci"; reg = <0x700b0600 0x200>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/dts/tegra186-p2771-0000-000.dts b/arch/arm/dts/tegra186-p2771-0000-000.dts index 84e850d6fca..39076058bfb 100644 --- a/arch/arm/dts/tegra186-p2771-0000-000.dts +++ b/arch/arm/dts/tegra186-p2771-0000-000.dts @@ -6,7 +6,7 @@ model = "NVIDIA P2771-0000-000"; compatible = "nvidia,p2771-0000-000", "nvidia,p2771-0000", "nvidia,tegra186"; - sdhci@3400000 { + mmc@3400000 { cd-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_LOW>; power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/dts/tegra186-p2771-0000-500.dts b/arch/arm/dts/tegra186-p2771-0000-500.dts index 1ac8ab431e9..cb36dae80e5 100644 --- a/arch/arm/dts/tegra186-p2771-0000-500.dts +++ b/arch/arm/dts/tegra186-p2771-0000-500.dts @@ -6,7 +6,7 @@ model = "NVIDIA P2771-0000-500"; compatible = "nvidia,p2771-0000-500", "nvidia,p2771-0000", "nvidia,tegra186"; - sdhci@3400000 { + mmc@3400000 { cd-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>; power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/dts/tegra186-p2771-0000.dtsi b/arch/arm/dts/tegra186-p2771-0000.dtsi index 7cda0b41f74..7bbf81fe2bf 100644 --- a/arch/arm/dts/tegra186-p2771-0000.dtsi +++ b/arch/arm/dts/tegra186-p2771-0000.dtsi @@ -10,8 +10,8 @@ aliases { ethernet = "/ethernet@2490000"; - mmc0 = "/sdhci@3460000"; - mmc1 = "/sdhci@3400000"; + mmc0 = "/mmc@3460000"; + mmc1 = "/mmc@3400000"; i2c0 = "/bpmp/i2c"; i2c1 = "/i2c@3160000"; i2c2 = "/i2c@c240000"; @@ -48,13 +48,13 @@ status = "okay"; }; - sdhci@3400000 { + mmc@3400000 { status = "okay"; wp-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>; bus-width = <4>; }; - sdhci@3460000 { + mmc@3460000 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi index edcb7aacb8e..0cabf608a9e 100644 --- a/arch/arm/dts/tegra186.dtsi +++ b/arch/arm/dts/tegra186.dtsi @@ -136,7 +136,7 @@ status = "disabled"; }; - sdhci@3400000 { + mmc@3400000 { compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03400000 0x0 0x200>; resets = <&bpmp TEGRA186_RESET_SDMMC1>; @@ -146,7 +146,7 @@ status = "disabled"; }; - sdhci@3460000 { + mmc@3460000 { compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03460000 0x0 0x200>; resets = <&bpmp TEGRA186_RESET_SDMMC4>; diff --git a/arch/arm/dts/tegra20-acer-a500-picasso.dts b/arch/arm/dts/tegra20-acer-a500-picasso.dts index 4afde766330..d8d2d10a48a 100644 --- a/arch/arm/dts/tegra20-acer-a500-picasso.dts +++ b/arch/arm/dts/tegra20-acer-a500-picasso.dts @@ -400,7 +400,7 @@ nvidia,xcvr-lsrslew = <2>; }; - sdmmc3: sdhci@c8000400 { + sdmmc3: mmc@c8000400 { status = "okay"; bus-width = <4>; @@ -412,7 +412,7 @@ vqmmc-supply = <&vdd_3v3_sys>; }; - sdmmc4: sdhci@c8000600 { + sdmmc4: mmc@c8000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra20-asus-transformer.dtsi b/arch/arm/dts/tegra20-asus-transformer.dtsi index df078a6fcdc..db6bed3e5d2 100644 --- a/arch/arm/dts/tegra20-asus-transformer.dtsi +++ b/arch/arm/dts/tegra20-asus-transformer.dtsi @@ -437,7 +437,7 @@ status = "okay"; }; - sdmmc3: sdhci@c8000400 { + sdmmc3: mmc@c8000400 { status = "okay"; bus-width = <4>; @@ -449,7 +449,7 @@ vqmmc-supply = <&vdd_3v3_sys>; }; - sdmmc4: sdhci@c8000600 { + sdmmc4: mmc@c8000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra20-colibri.dts b/arch/arm/dts/tegra20-colibri.dts index 11023968f41..776491a515e 100644 --- a/arch/arm/dts/tegra20-colibri.dts +++ b/arch/arm/dts/tegra20-colibri.dts @@ -14,7 +14,7 @@ i2c0 = "/i2c@7000d000"; i2c1 = "/i2c@7000c000"; i2c2 = "/i2c@7000c400"; - mmc0 = "/sdhci@c8000600"; + mmc0 = "/mmc@c8000600"; usb0 = "/usb@c5000000"; usb1 = "/usb@c5004000"; /* On-module only, for ASIX */ usb2 = "/usb@c5008000"; @@ -106,7 +106,7 @@ nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; }; - sdhci@c8000600 { + mmc@c8000600 { status = "okay"; bus-width = <4>; cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/tegra20-harmony.dts b/arch/arm/dts/tegra20-harmony.dts index 7fe7d52096c..60cc7b32bb0 100644 --- a/arch/arm/dts/tegra20-harmony.dts +++ b/arch/arm/dts/tegra20-harmony.dts @@ -18,8 +18,8 @@ usb0 = "/usb@c5000000"; usb1 = "/usb@c5004000"; usb2 = "/usb@c5008000"; - mmc0 = "/sdhci@c8000600"; - mmc1 = "/sdhci@c8000200"; + mmc0 = "/mmc@c8000600"; + mmc1 = "/mmc@c8000200"; }; memory { @@ -645,7 +645,7 @@ status = "okay"; }; - sdhci@c8000200 { + mmc@c8000200 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; @@ -653,7 +653,7 @@ bus-width = <4>; }; - sdhci@c8000600 { + mmc@c8000600 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>; wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/dts/tegra20-lg-star.dts b/arch/arm/dts/tegra20-lg-star.dts index 083598b1b92..912c0b6051b 100644 --- a/arch/arm/dts/tegra20-lg-star.dts +++ b/arch/arm/dts/tegra20-lg-star.dts @@ -327,13 +327,7 @@ pmic: max8907@3c { compatible = "maxim,max8907"; reg = <0x3c>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <2>; - interrupt-controller; - - #gpio-cells = <2>; - gpio-controller; maxim,system-power-controller; @@ -419,7 +413,7 @@ vbus-supply = <&avdd_3v3_usb>; }; - sdmmc3: sdhci@c8000400 { + sdmmc3: mmc@c8000400 { status = "okay"; bus-width = <4>; @@ -429,7 +423,7 @@ vqmmc-supply = <&vdd_1v8_vio>; }; - sdmmc4: sdhci@c8000600 { + sdmmc4: mmc@c8000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra20-medcom-wide.dts b/arch/arm/dts/tegra20-medcom-wide.dts index 1c79d757467..00e9272541a 100644 --- a/arch/arm/dts/tegra20-medcom-wide.dts +++ b/arch/arm/dts/tegra20-medcom-wide.dts @@ -12,7 +12,7 @@ aliases { usb0 = "/usb@c5008000"; - mmc0 = "/sdhci@c8000600"; + mmc0 = "/mmc@c8000600"; }; memory { diff --git a/arch/arm/dts/tegra20-motorola-mot.dtsi b/arch/arm/dts/tegra20-motorola-mot.dtsi index db2cce1cc0d..b3c0e36340d 100644 --- a/arch/arm/dts/tegra20-motorola-mot.dtsi +++ b/arch/arm/dts/tegra20-motorola-mot.dtsi @@ -330,7 +330,7 @@ backlight_led: led@0 { reg = <0>; - led-sources = <2>; + led-sources = <0>; led-max-microamp = <26600>; ti,led-mode = <0>; @@ -425,7 +425,7 @@ vbus-supply = <&avdd_3v3_periph>; }; - sdmmc3: sdhci@c8000400 { + sdmmc3: mmc@c8000400 { status = "okay"; bus-width = <4>; @@ -435,7 +435,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@c8000600 { + sdmmc4: mmc@c8000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra20-paz00.dts b/arch/arm/dts/tegra20-paz00.dts index f851767a55f..91799518412 100644 --- a/arch/arm/dts/tegra20-paz00.dts +++ b/arch/arm/dts/tegra20-paz00.dts @@ -19,8 +19,8 @@ usb0 = "/usb@c5000000"; usb1 = "/usb@c5004000"; usb2 = "/usb@c5008000"; - mmc0 = "/sdhci@c8000600"; - mmc1 = "/sdhci@c8000000"; + mmc0 = "/mmc@c8000600"; + mmc1 = "/mmc@c8000000"; }; memory { @@ -485,7 +485,7 @@ status = "okay"; }; - sdhci@c8000000 { + mmc@c8000000 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>; wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; @@ -493,7 +493,7 @@ bus-width = <4>; }; - sdhci@c8000600 { + mmc@c8000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra20-plutux.dts b/arch/arm/dts/tegra20-plutux.dts index 1b642be9928..8d8672da23d 100644 --- a/arch/arm/dts/tegra20-plutux.dts +++ b/arch/arm/dts/tegra20-plutux.dts @@ -12,7 +12,7 @@ aliases { usb0 = "/usb@c5008000"; - mmc0 = "/sdhci@c8000600"; + mmc0 = "/mmc@c8000600"; }; memory { diff --git a/arch/arm/dts/tegra20-samsung-bose.dts b/arch/arm/dts/tegra20-samsung-bose.dts index 5bb9a33adf2..64cf8489707 100644 --- a/arch/arm/dts/tegra20-samsung-bose.dts +++ b/arch/arm/dts/tegra20-samsung-bose.dts @@ -92,7 +92,7 @@ }; }; - sdhci@c8000400 { + mmc@c8000400 { broken-cd; }; diff --git a/arch/arm/dts/tegra20-samsung-n1-common.dtsi b/arch/arm/dts/tegra20-samsung-n1-common.dtsi index 8223c5ece54..b82e6464248 100644 --- a/arch/arm/dts/tegra20-samsung-n1-common.dtsi +++ b/arch/arm/dts/tegra20-samsung-n1-common.dtsi @@ -319,13 +319,7 @@ pmic: max8907@3c { compatible = "maxim,max8907"; reg = <0x3c>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <2>; - interrupt-controller; - - #gpio-cells = <2>; - gpio-controller; maxim,system-power-controller; @@ -371,7 +365,7 @@ vbus-supply = <&usb_phy_reg>; }; - sdmmc3: sdhci@c8000400 { + sdmmc3: mmc@c8000400 { status = "okay"; bus-width = <4>; @@ -379,7 +373,7 @@ vqmmc-supply = <&vdd_3v3_sys>; }; - sdmmc4: sdhci@c8000600 { + sdmmc4: mmc@c8000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra20-samsung-n1.dts b/arch/arm/dts/tegra20-samsung-n1.dts index 930a3195aa0..82b337973b9 100644 --- a/arch/arm/dts/tegra20-samsung-n1.dts +++ b/arch/arm/dts/tegra20-samsung-n1.dts @@ -151,7 +151,7 @@ }; }; - sdhci@c8000400 { + mmc@c8000400 { /* battery blocks the sdcard slot and the device lacks CD pin */ non-removable; }; diff --git a/arch/arm/dts/tegra20-seaboard.dts b/arch/arm/dts/tegra20-seaboard.dts index 341c7f35836..dbb2e49962e 100644 --- a/arch/arm/dts/tegra20-seaboard.dts +++ b/arch/arm/dts/tegra20-seaboard.dts @@ -19,8 +19,8 @@ rtc0 = "/i2c@7000d000/tps6586x@34"; rtc1 = "/rtc@7000e000"; serial0 = &uartd; - mmc0 = "/sdhci@c8000600"; - mmc1 = "/sdhci@c8000400"; + mmc0 = "/mmc@c8000600"; + mmc1 = "/mmc@c8000400"; }; chosen { @@ -803,14 +803,14 @@ status = "okay"; }; - sdhci@c8000000 { + mmc@c8000000 { status = "okay"; power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; bus-width = <4>; keep-power-in-suspend; }; - sdhci@c8000400 { + mmc@c8000400 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; @@ -818,7 +818,7 @@ bus-width = <4>; }; - sdhci@c8000600 { + mmc@c8000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra20-tamonten.dtsi b/arch/arm/dts/tegra20-tamonten.dtsi index f13ef4d05a8..98fa51bed30 100644 --- a/arch/arm/dts/tegra20-tamonten.dtsi +++ b/arch/arm/dts/tegra20-tamonten.dtsi @@ -476,7 +476,7 @@ status = "okay"; }; - sdhci@c8000600 { + mmc@c8000600 { cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>; wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; bus-width = <4>; diff --git a/arch/arm/dts/tegra20-tec.dts b/arch/arm/dts/tegra20-tec.dts index 4733c813490..b26979496c6 100644 --- a/arch/arm/dts/tegra20-tec.dts +++ b/arch/arm/dts/tegra20-tec.dts @@ -12,7 +12,7 @@ aliases { usb0 = "/usb@c5008000"; - mmc0 = "/sdhci@c8000600"; + mmc0 = "/mmc@c8000600"; }; memory { diff --git a/arch/arm/dts/tegra20-trimslice.dts b/arch/arm/dts/tegra20-trimslice.dts index fa942d26078..9542eb6c41b 100644 --- a/arch/arm/dts/tegra20-trimslice.dts +++ b/arch/arm/dts/tegra20-trimslice.dts @@ -12,8 +12,8 @@ aliases { usb0 = "/usb@c5000000"; - mmc0 = "/sdhci@c8000600"; - mmc1 = "/sdhci@c8000000"; + mmc0 = "/mmc@c8000600"; + mmc1 = "/mmc@c8000000"; spi0 = "/spi@7000c380"; }; @@ -55,12 +55,12 @@ nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; }; - sdhci@c8000000 { + mmc@c8000000 { status = "okay"; bus-width = <4>; }; - sdhci@c8000600 { + mmc@c8000600 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>; wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/dts/tegra20-ventana.dts b/arch/arm/dts/tegra20-ventana.dts index 85cd1e39bda..50cf78e4170 100644 --- a/arch/arm/dts/tegra20-ventana.dts +++ b/arch/arm/dts/tegra20-ventana.dts @@ -18,8 +18,8 @@ usb0 = "/usb@c5000000"; usb1 = "/usb@c5004000"; usb2 = "/usb@c5008000"; - mmc0 = "/sdhci@c8000600"; - mmc1 = "/sdhci@c8000400"; + mmc0 = "/mmc@c8000600"; + mmc1 = "/mmc@c8000400"; }; memory { @@ -576,14 +576,14 @@ status = "okay"; }; - sdhci@c8000000 { + mmc@c8000000 { status = "okay"; power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; bus-width = <4>; keep-power-in-suspend; }; - sdhci@c8000400 { + mmc@c8000400 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; @@ -591,7 +591,7 @@ bus-width = <4>; }; - sdhci@c8000600 { + mmc@c8000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index 4a40edfdfbe..430df19b8b7 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -766,7 +766,7 @@ status = "disabled"; }; - sdhci@c8000000 { + mmc@c8000000 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000000 0x200>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; @@ -776,7 +776,7 @@ status = "disabled"; }; - sdhci@c8000200 { + mmc@c8000200 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000200 0x200>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; @@ -786,7 +786,7 @@ status = "disabled"; }; - sdhci@c8000400 { + mmc@c8000400 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000400 0x200>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; @@ -796,7 +796,7 @@ status = "disabled"; }; - sdhci@c8000600 { + mmc@c8000600 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000600 0x200>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/dts/tegra210-p2371-0000.dts b/arch/arm/dts/tegra210-p2371-0000.dts index 539e7cef93b..e5e9d68651a 100644 --- a/arch/arm/dts/tegra210-p2371-0000.dts +++ b/arch/arm/dts/tegra210-p2371-0000.dts @@ -12,8 +12,8 @@ aliases { i2c0 = "/i2c@7000d000"; - mmc0 = "/sdhci@700b0600"; - mmc1 = "/sdhci@700b0000"; + mmc0 = "/mmc@700b0600"; + mmc1 = "/mmc@700b0000"; usb0 = "/usb@7d000000"; }; @@ -21,14 +21,14 @@ reg = <0x0 0x80000000 0x0 0xc0000000>; }; - sdhci@700b0000 { + mmc@700b0000 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; bus-width = <4>; }; - sdhci@700b0600 { + mmc@700b0600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts index 649c163152e..a619b2475eb 100644 --- a/arch/arm/dts/tegra210-p2371-2180.dts +++ b/arch/arm/dts/tegra210-p2371-2180.dts @@ -14,8 +14,8 @@ i2c0 = "/i2c@7000d000"; i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; - mmc0 = "/sdhci@700b0600"; - mmc1 = "/sdhci@700b0000"; + mmc0 = "/mmc@700b0600"; + mmc1 = "/mmc@700b0000"; usb0 = "/usb@7d000000"; }; @@ -73,7 +73,7 @@ }; }; - sdhci@700b0000 { + mmc@700b0000 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; @@ -81,7 +81,7 @@ bus-width = <4>; }; - sdhci@700b0600 { + mmc@700b0600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra210-p2571.dts b/arch/arm/dts/tegra210-p2571.dts index 16370c596e0..f48ce4d662f 100644 --- a/arch/arm/dts/tegra210-p2571.dts +++ b/arch/arm/dts/tegra210-p2571.dts @@ -17,8 +17,8 @@ i2c3 = "/i2c@7000c500"; i2c4 = "/i2c@7000c700"; i2c5 = "/i2c@7000d100"; - mmc0 = "/sdhci@700b0600"; - mmc1 = "/sdhci@700b0000"; + mmc0 = "/mmc@700b0600"; + mmc1 = "/mmc@700b0000"; spi0 = "/spi@7000d400"; spi1 = "/spi@7000da00"; spi2 = "/spi@70410000"; @@ -74,14 +74,14 @@ spi-max-frequency = <24000000>; }; - sdhci@700b0000 { + mmc@700b0000 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; bus-width = <4>; }; - sdhci@700b0600 { + mmc@700b0600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts index ddeeb232de2..333060a4ec7 100644 --- a/arch/arm/dts/tegra210-p3450-0000.dts +++ b/arch/arm/dts/tegra210-p3450-0000.dts @@ -20,8 +20,8 @@ i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; i2c4 = "/i2c@7000c700"; - mmc0 = "/sdhci@700b0600"; - mmc1 = "/sdhci@700b0000"; + mmc0 = "/mmc@700b0600"; + mmc1 = "/mmc@700b0000"; spi0 = "/spi@70410000"; usb0 = "/usb@7d000000"; }; @@ -89,14 +89,14 @@ }; }; - sdhci@700b0000 { + mmc@700b0000 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; bus-width = <4>; }; - sdhci@700b0600 { + mmc@700b0600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi index 92eb4f67bf5..45b1ca9a041 100644 --- a/arch/arm/dts/tegra210.dtsi +++ b/arch/arm/dts/tegra210.dtsi @@ -696,7 +696,7 @@ #phy-cells = <1>; }; - sdhci@700b0000 { + mmc@700b0000 { compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; reg = <0x0 0x700b0000 0x0 0x200>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; @@ -709,7 +709,7 @@ status = "disabled"; }; - sdhci@700b0200 { + mmc@700b0200 { compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; reg = <0x0 0x700b0200 0x0 0x200>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; @@ -722,7 +722,7 @@ status = "disabled"; }; - sdhci@700b0400 { + mmc@700b0400 { compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; reg = <0x0 0x700b0400 0x0 0x200>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; @@ -735,7 +735,7 @@ status = "disabled"; }; - sdhci@700b0600 { + mmc@700b0600 { compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; reg = <0x0 0x700b0600 0x0 0x200>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts index 77502dfdb47..19553d14fb1 100644 --- a/arch/arm/dts/tegra30-apalis.dts +++ b/arch/arm/dts/tegra30-apalis.dts @@ -15,9 +15,9 @@ i2c1 = "/i2c@7000c000"; i2c2 = "/i2c@7000c500"; i2c3 = "/i2c@7000c700"; - mmc0 = "/sdhci@78000600"; - mmc1 = "/sdhci@78000400"; - mmc2 = "/sdhci@78000000"; + mmc0 = "/mmc@78000600"; + mmc1 = "/mmc@78000400"; + mmc2 = "/mmc@78000000"; spi0 = "/spi@7000d400"; spi1 = "/spi@7000dc00"; spi2 = "/spi@7000de00"; @@ -246,21 +246,21 @@ spi-max-frequency = <25000000>; }; - sdhci@78000000 { + mmc@78000000 { status = "okay"; bus-width = <4>; /* SD1_CD# */ cd-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_LOW>; }; - sdhci@78000400 { + mmc@78000400 { status = "okay"; bus-width = <8>; /* MMC1_CD# */ cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>; }; - sdhci@78000600 { + mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-asus-grouper-common.dtsi b/arch/arm/dts/tegra30-asus-grouper-common.dtsi index ddacdbb85c8..8eb36eb8164 100644 --- a/arch/arm/dts/tegra30-asus-grouper-common.dtsi +++ b/arch/arm/dts/tegra30-asus-grouper-common.dtsi @@ -773,7 +773,7 @@ clock-frequency = <400000>; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-asus-p1801-t.dts b/arch/arm/dts/tegra30-asus-p1801-t.dts index 31cbef1b93c..2d6b4aba016 100644 --- a/arch/arm/dts/tegra30-asus-p1801-t.dts +++ b/arch/arm/dts/tegra30-asus-p1801-t.dts @@ -1100,7 +1100,7 @@ }; }; - sdmmc1: sdhci@78000000 { + sdmmc1: mmc@78000000 { status = "okay"; bus-width = <4>; @@ -1111,7 +1111,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-asus-tf600t.dts b/arch/arm/dts/tegra30-asus-tf600t.dts index 5135b8c666c..498c398baad 100644 --- a/arch/arm/dts/tegra30-asus-tf600t.dts +++ b/arch/arm/dts/tegra30-asus-tf600t.dts @@ -1065,7 +1065,7 @@ }; }; - sdmmc1: sdhci@78000000 { + sdmmc1: mmc@78000000 { status = "okay"; bus-width = <4>; @@ -1076,7 +1076,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-asus-transformer.dtsi b/arch/arm/dts/tegra30-asus-transformer.dtsi index 47a44fbc9dd..e58414dc4b0 100644 --- a/arch/arm/dts/tegra30-asus-transformer.dtsi +++ b/arch/arm/dts/tegra30-asus-transformer.dtsi @@ -1093,7 +1093,7 @@ }; }; - sdmmc1: sdhci@78000000 { + sdmmc1: mmc@78000000 { status = "okay"; bus-width = <4>; @@ -1104,7 +1104,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-beaver.dts b/arch/arm/dts/tegra30-beaver.dts index 9bb097b0813..b78982edd1a 100644 --- a/arch/arm/dts/tegra30-beaver.dts +++ b/arch/arm/dts/tegra30-beaver.dts @@ -16,8 +16,8 @@ i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; i2c4 = "/i2c@7000c700"; - mmc0 = "/sdhci@78000600"; - mmc1 = "/sdhci@78000000"; + mmc0 = "/mmc@78000600"; + mmc1 = "/mmc@78000000"; spi0 = "/spi@7000da00"; usb0 = "/usb@7d000000"; usb1 = "/usb@7d008000"; @@ -191,7 +191,7 @@ }; }; - sdhci@78000000 { + mmc@78000000 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>; @@ -199,7 +199,7 @@ bus-width = <4>; }; - sdhci@78000600 { + mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-cardhu.dts b/arch/arm/dts/tegra30-cardhu.dts index 7534861e40d..299ba7ef371 100644 --- a/arch/arm/dts/tegra30-cardhu.dts +++ b/arch/arm/dts/tegra30-cardhu.dts @@ -16,8 +16,8 @@ i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; i2c4 = "/i2c@7000c700"; - mmc0 = "/sdhci@78000600"; - mmc1 = "/sdhci@78000000"; + mmc0 = "/mmc@78000600"; + mmc1 = "/mmc@78000000"; spi0 = "/spi@7000da00"; usb0 = "/usb@7d008000"; }; @@ -183,7 +183,7 @@ spi-max-frequency = <25000000>; }; - sdhci@78000000 { + mmc@78000000 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>; @@ -191,7 +191,7 @@ bus-width = <4>; }; - sdhci@78000600 { + mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-colibri.dts b/arch/arm/dts/tegra30-colibri.dts index 38afe7819c7..075a35f1c9a 100644 --- a/arch/arm/dts/tegra30-colibri.dts +++ b/arch/arm/dts/tegra30-colibri.dts @@ -14,8 +14,8 @@ i2c0 = "/i2c@7000d000"; i2c1 = "/i2c@7000c000"; i2c2 = "/i2c@7000c700"; - mmc0 = "/sdhci@78000600"; - mmc1 = "/sdhci@78000200"; + mmc0 = "/mmc@78000600"; + mmc1 = "/mmc@78000200"; spi0 = "/spi@7000d400"; usb0 = "/usb@7d000000"; usb1 = "/usb@7d004000"; /* on module only, for ASIX */ @@ -61,13 +61,13 @@ spi-max-frequency = <25000000>; }; - sdhci@78000200 { + mmc@78000200 { status = "okay"; bus-width = <4>; cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */ }; - sdhci@78000600 { + mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-htc-endeavoru.dts b/arch/arm/dts/tegra30-htc-endeavoru.dts index 79f423bd22a..e67d335f73c 100644 --- a/arch/arm/dts/tegra30-htc-endeavoru.dts +++ b/arch/arm/dts/tegra30-htc-endeavoru.dts @@ -1246,7 +1246,7 @@ }; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-lenovo-ideapad-yoga-11.dts b/arch/arm/dts/tegra30-lenovo-ideapad-yoga-11.dts index 53f42089d30..2d96d6867e6 100644 --- a/arch/arm/dts/tegra30-lenovo-ideapad-yoga-11.dts +++ b/arch/arm/dts/tegra30-lenovo-ideapad-yoga-11.dts @@ -1119,7 +1119,7 @@ >; }; - sdmmc1: sdhci@78000000 { + sdmmc1: mmc@78000000 { status = "okay"; bus-width = <4>; @@ -1129,7 +1129,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-lg-p880.dts b/arch/arm/dts/tegra30-lg-p880.dts index ab5993150b2..84b6dc1f95a 100644 --- a/arch/arm/dts/tegra30-lg-p880.dts +++ b/arch/arm/dts/tegra30-lg-p880.dts @@ -126,7 +126,7 @@ }; }; - sdmmc3: sdhci@78000400 { + sdmmc3: mmc@78000400 { status = "okay"; bus-width = <4>; diff --git a/arch/arm/dts/tegra30-lg-p895.dts b/arch/arm/dts/tegra30-lg-p895.dts index 988e772172c..a45d57b3e71 100644 --- a/arch/arm/dts/tegra30-lg-p895.dts +++ b/arch/arm/dts/tegra30-lg-p895.dts @@ -120,7 +120,7 @@ reset-gpios = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_LOW>; renesas,gamma = <3>; - renesas,inversion; + renesas,column-inversion; renesas,contrast; vcc-supply = <&vcc_3v0_lcd>; diff --git a/arch/arm/dts/tegra30-lg-x3.dtsi b/arch/arm/dts/tegra30-lg-x3.dtsi index 09c5d04a225..9c074f3c553 100644 --- a/arch/arm/dts/tegra30-lg-x3.dtsi +++ b/arch/arm/dts/tegra30-lg-x3.dtsi @@ -1031,7 +1031,7 @@ }; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-microsoft-surface-rt.dts b/arch/arm/dts/tegra30-microsoft-surface-rt.dts index 2d22d3e0bb1..77cd79cb0d6 100644 --- a/arch/arm/dts/tegra30-microsoft-surface-rt.dts +++ b/arch/arm/dts/tegra30-microsoft-surface-rt.dts @@ -946,7 +946,7 @@ }; }; - sdmmc1: sdhci@78000000 { + sdmmc1: mmc@78000000 { status = "okay"; bus-width = <4>; @@ -956,7 +956,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-ouya.dts b/arch/arm/dts/tegra30-ouya.dts index e6b2824d783..4911c802a51 100644 --- a/arch/arm/dts/tegra30-ouya.dts +++ b/arch/arm/dts/tegra30-ouya.dts @@ -1970,7 +1970,7 @@ }; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-pegatron-chagall.dts b/arch/arm/dts/tegra30-pegatron-chagall.dts index 98eb369f7a8..1ff53b7c54b 100644 --- a/arch/arm/dts/tegra30-pegatron-chagall.dts +++ b/arch/arm/dts/tegra30-pegatron-chagall.dts @@ -1121,7 +1121,7 @@ }; }; - sdmmc1: sdhci@78000000 { + sdmmc1: mmc@78000000 { status = "okay"; bus-width = <4>; @@ -1131,7 +1131,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-tamonten.dtsi b/arch/arm/dts/tegra30-tamonten.dtsi index 33da1754d30..0240568cd94 100644 --- a/arch/arm/dts/tegra30-tamonten.dtsi +++ b/arch/arm/dts/tegra30-tamonten.dtsi @@ -18,9 +18,9 @@ i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; i2c4 = "/i2c@7000d000"; - mmc0 = "/sdhci@78000600"; - mmc1 = "/sdhci@78000400"; - mmc2 = "/sdhci@78000000"; + mmc0 = "/mmc@78000600"; + mmc1 = "/mmc@78000400"; + mmc2 = "/mmc@78000000"; usb0 = "/usb@7d008000"; }; @@ -54,14 +54,14 @@ }; /* SD slot on the base board */ - sdhci@78000400 { + mmc@78000400 { cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; wp-gpios = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>; bus-width = <4>; }; /* EMMC on the COM module */ - sdhci@78000600 { + mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30-tec-ng.dts b/arch/arm/dts/tegra30-tec-ng.dts index f2a49b8cbe2..444a390ba58 100644 --- a/arch/arm/dts/tegra30-tec-ng.dts +++ b/arch/arm/dts/tegra30-tec-ng.dts @@ -16,7 +16,7 @@ }; /* SD card slot */ - sdhci@78000400 { + mmc@78000400 { status = "okay"; }; }; diff --git a/arch/arm/dts/tegra30-wexler-qc750.dts b/arch/arm/dts/tegra30-wexler-qc750.dts index ededbf579fd..c310a22f56f 100644 --- a/arch/arm/dts/tegra30-wexler-qc750.dts +++ b/arch/arm/dts/tegra30-wexler-qc750.dts @@ -985,7 +985,7 @@ }; }; - sdmmc1: sdhci@78000000 { + sdmmc1: mmc@78000000 { status = "okay"; bus-width = <4>; @@ -996,7 +996,7 @@ vqmmc-supply = <&vddio_usd>; }; - sdmmc4: sdhci@78000600 { + sdmmc4: mmc@78000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi index 82e843d05be..cf772338b55 100644 --- a/arch/arm/dts/tegra30.dtsi +++ b/arch/arm/dts/tegra30.dtsi @@ -803,7 +803,7 @@ }; }; - sdhci@78000000 { + mmc@78000000 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000000 0x200>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; @@ -813,7 +813,7 @@ status = "disabled"; }; - sdhci@78000200 { + mmc@78000200 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000200 0x200>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; @@ -823,7 +823,7 @@ status = "disabled"; }; - sdhci@78000400 { + mmc@78000400 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000400 0x200>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; @@ -833,7 +833,7 @@ status = "disabled"; }; - sdhci@78000600 { + mmc@78000600 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000600 0x200>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h index a399c94213b..8c38c71c93a 100644 --- a/arch/arm/include/asm/arch-tegra/tegra.h +++ b/arch/arm/include/asm/arch-tegra/tegra.h @@ -68,6 +68,7 @@ struct timerus { /* These are the available SKUs (product types) for Tegra */ enum { + SKU_ID_T20_A04 = 0x4, /* Sony Tablet P value */ SKU_ID_AP20 = 0x7, SKU_ID_T20 = 0x8, SKU_ID_AP20H = 0xf, diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c index a7938ed7910..48617f3ea93 100644 --- a/arch/arm/mach-tegra/ap.c +++ b/arch/arm/mach-tegra/ap.c @@ -66,6 +66,7 @@ int tegra_get_chip_sku(void) switch (chip_id) { case CHIPID_TEGRA20: switch (sku_id) { + case SKU_ID_T20_A04: case SKU_ID_AP20: case SKU_ID_T20: case SKU_ID_AP20H: @@ -76,6 +77,9 @@ int tegra_get_chip_sku(void) case SKU_ID_AP25E: case SKU_ID_T25E: return TEGRA_SOC_T25; + default: + debug("%s: UNKNOWN Tegra20 SKU ID (0x%02x)\n", __func__, sku_id); + return TEGRA_SOC_T20; } break; case CHIPID_TEGRA30: @@ -83,7 +87,9 @@ int tegra_get_chip_sku(void) case SKU_ID_T33: case SKU_ID_T30: case SKU_ID_TM30MQS_P_A3: + return TEGRA_SOC_T30; default: + debug("%s: UNKNOWN Tegra30 SKU ID (0x%02x)\n", __func__, sku_id); return TEGRA_SOC_T30; } break; @@ -91,21 +97,27 @@ int tegra_get_chip_sku(void) switch (sku_id) { case SKU_ID_T114_ENG: case SKU_ID_T114_1: + return TEGRA_SOC_T114; default: + debug("%s: UNKNOWN Tegra114 SKU ID (0x%02x)\n", __func__, sku_id); return TEGRA_SOC_T114; } break; case CHIPID_TEGRA124: switch (sku_id) { case SKU_ID_T124_ENG: + return TEGRA_SOC_T124; default: + debug("%s: UNKNOWN Tegra124 SKU ID (0x%02x)\n", __func__, sku_id); return TEGRA_SOC_T124; } break; case CHIPID_TEGRA210: switch (sku_id) { case SKU_ID_T210_ENG: + return TEGRA_SOC_T210; default: + debug("%s: UNKNOWN Tegra210 SKU ID (0x%02x)\n", __func__, sku_id); return TEGRA_SOC_T210; } break; diff --git a/board/lg/star/star.c b/board/lg/star/star.c index 0b4a433a5df..ab700cbe828 100644 --- a/board/lg/star/star.c +++ b/board/lg/star/star.c @@ -46,6 +46,8 @@ void pinmux_init(void) #if IS_ENABLED(CONFIG_OF_LIBFDT) && IS_ENABLED(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *fdt, struct bd_info *bd) { - return star_fix_panel(fdt); + star_fix_panel(fdt); + + return 0; } #endif diff --git a/doc/board/acer/picasso.rst b/doc/board/acer/picasso.rst index b1d360defd8..47c6f7f00c5 100644 --- a/doc/board/acer/picasso.rst +++ b/doc/board/acer/picasso.rst @@ -5,7 +5,8 @@ U-Boot for the Acer Iconia Tab A500 ``DISCLAMER!`` Moving your Acer Iconia Tab A500 to use U-Boot assumes replacement of the vendor Acer bootloader. Vendor Android firmwares will no -longer be able to run on the device. This replacement IS reversible. +longer be able to run on the device. This replacement IS reversible if you have +backups. Quick Start ----------- @@ -13,6 +14,7 @@ Quick Start - Build U-Boot - Process U-Boot - Flashing U-Boot into the eMMC +- Flashing U-Boot into the eMMC with NvFlash - Boot - Self Upgrading @@ -36,61 +38,45 @@ in re-crypt repo issues. NOT HERE! re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form usable by device. This process is required only on the first installation or -to recover the device in case of a failed update. - -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. - -Processing for the NV3P protocol -******************************** +to recover the device in case of a failed update. You need to know your device +individual SBK to continue. .. code-block:: bash $ git clone https://gitlab.com/grate-driver/re-crypt.git $ cd re-crypt # place your u-boot-dtb-tegra.bin here - $ ./re-crypt.py --dev a500 - -The script will produce a ``repart-block.bin`` ready to flash. + $ ./re-crypt.py --dev a500 --sbk <your sbk> --split -Processing for pre-loaded U-Boot -******************************** +where SBK has next form ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` -The procedure is the same, but the ``--split`` argument is used with the -``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready -to flash. +The script will produce ``bct.img`` and ``ebt.img`` ready to flash. Flashing U-Boot into the eMMC ----------------------------- -``DISCLAMER!`` All questions related to NvFlash should be asked in the proper +``DISCLAMER!`` All questions related to fusee-tools should be asked in the proper place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. +Permanent installation can be performed by pre-loading just built U-Boot into RAM. +Bct and bootloader will end up in boot0 and boot1 partitions of eMMC. -Flashing with the NV3P protocol -******************************* +You have to clone and prepare fusee-tools from here: https://gitlab.com/grate-driver/fusee-tools +according to fusee-tools README to continue. -Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can -enter it either by pre-loading vendor bootloader into RAM with the nvflash. +Bootloader preloading is performed to device in APX/RCM mode connected to host +PC. This mode can be entered by holding ``power`` and ``volume up`` buttons on +turned off tablet connected to the host PC. Host PC should detect APX USB +device in ``lsusb``. -With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in -encrypted state in form, which can just be written RAW at the start of eMMC. +U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently +U-Boot supports bootmenu entry fastboot, which allows to write a processed copy +of U-Boot permanently into eMMC. This is how U-Boot can be preloaded using +fusee-tools: .. code-block:: bash - $ nvflash --setbct --bct picasso.bct --configfile flash.cfg --bl bootloader.bin - --sbk 0xXXXXXXXX 0xXXXXXXXX 0xXXXXXXXX 0xXXXXXXXX --sync # replace with your SBK - $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin - -When flashing is done, reboot the device. - -Flashing with a pre-loaded U-Boot -********************************* - -U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently -U-Boot supports bootmenu entry fastboot, which allows to write a processed copy -of U-Boot permanently into eMMC. + $ ./utils/nvflash_t20 --setbct --bct ./bct/picasso.bct --configfile ./utils/flash.cfg + --bl u-boot-dtb-tegra.bin --sbk <your sbk> --sync While pre-loading U-Boot, hold the ``volume down`` button which will trigger the bootmenu. There, select ``fastboot`` using the volume and power buttons. @@ -104,6 +90,37 @@ After, on host PC, do: Device will reboot. +Flashing U-Boot into the eMMC with NvFlash +------------------------------------------ + +``DISCLAMER!`` All questions related to NvFlash should be asked in the proper +place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! + +This method is discouraged and is used only if fastboot commands from previous +chapter failed with ``Writing '0.1' FAILED (remote: 'too large for partition')`` +error. This error means that your tablet has 512 Kb boot0/boot1 partitons which +is too small to contain U-Boot image as the minimum boot partition size must +me 1 MB. This situation can be workarounded but self-update will not work and +flashing to eMMC will wipe U-Boot. This should not be a big issue since installing +OS on microSD is a preferred method anyway. + +This method involves use of Nv3p. Nv3p is a custom Nvidia protocol used to +recover bricked devices. Devices can enter it by pre-loading vendor bootloader +into RAM with the nvflash. + +With Nv3p, ``repart-block.bin`` is used (produced by re-crypt without ``--split`` +key). It contains BCT and a bootloader in encrypted state in form, which can just +be written RAW at the start of eMMC. Place your ``repart-block.bin`` and vendor +bootloader with name ``bootloader.bin`` into fusee-tools folder and run: + +.. code-block:: bash + + $ ./utils/nvflash_t20 --setbct --bct ./bct/picasso.bct --configfile ./utils/flash.cfg + --bl ./bootloader.bin --sbk <your sbk> --sync + $ ./utils/nvflash_t20 --resume --rawdevicewrite 0 512 ./repart-block.bin + +When flashing is done, reboot the device. + Boot ---- @@ -113,8 +130,8 @@ device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check the next chapter). -Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows -the user to use/partition it in any way the user desires. +Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and +allows the user to use/partition it in any way the user desires. Self Upgrading -------------- diff --git a/doc/board/asus/grouper.rst b/doc/board/asus/grouper.rst index 14469582907..78183482a00 100644 --- a/doc/board/asus/grouper.rst +++ b/doc/board/asus/grouper.rst @@ -5,7 +5,8 @@ U-Boot for the ASUS/Google Nexus 7 (2012) ``DISCLAMER!`` Moving your ASUS/Google Nexus 7 (2012) to use U-Boot assumes replacement of the vendor ASUS bootloader. Vendor android firmwares will no -longer be able to run on the device. This replacement IS reversible. +longer be able to run on the device. This replacement IS reversible if you +have backups. Quick Start ----------- @@ -39,65 +40,45 @@ Process U-Boot in re-crypt repo issues. NOT HERE! re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form -usable by device. This process is required only on the first installation or -to recover the device in case of a failed update. You need to know your -tablet's individual SBK to continue. - -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. - -Processing for the NV3P protocol -******************************** +usable by device. This process is required only on the first installation or to +recover the device in case of a failed update. You need to know your device +individual SBK to continue. .. code-block:: bash $ git clone https://gitlab.com/grate-driver/re-crypt.git $ cd re-crypt # place your u-boot-dtb-tegra.bin here - $ ./re-crypt.py --dev grouper --sbk <your sbk> + $ ./re-crypt.py --dev grouper --sbk <your sbk> --split # or --dev tilapia where SBK has next form ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` -The script will produce a ``repart-block.bin`` ready to flash. - -Processing for pre-loaded U-Boot -******************************** - -The procedure is the same, but the ``--split`` argument is used with the -``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready -to flash. +The script will produce ``bct.img`` and ``ebt.img`` ready to flash. Flashing U-Boot into the eMMC ----------------------------- -``DISCLAMER!`` All questions related to NvFlash should be asked in the proper +``DISCLAMER!`` All questions related to fusee-tools should be asked in the proper place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. +Permanent installation can be performed by pre-loading just built U-Boot into RAM. +Bct and bootloader will end up in boot0 and boot1 partitions of eMMC. -Flashing with the NV3P protocol -******************************* +You have to clone and prepare fusee-tools from here: https://gitlab.com/grate-driver/fusee-tools +according to fusee-tools README to continue. -Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can -enter it by pre-loading vendor bootloader with the Fusée Gelée. +Bootloader preloading is performed to device in APX/RCM mode connected to host +PC. This mode can be entered by holding ``power`` and ``volume up`` buttons on +turned off tablet connected to the host PC. Host PC should detect APX USB +device in ``lsusb``. -With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in -encrypted state in form, which can just be written RAW at the start of eMMC. +U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently +U-Boot supports bootmenu entry fastboot, which allows to write a processed copy +of U-Boot permanently into eMMC. This is how U-Boot can be preloaded using +fusee-tools: .. code-block:: bash - $ ./run_bootloader.sh -s T30 -t ./bct/grouper.bct -b android_bootloader.bin - $ ./utiils/nvflash_v1.13.87205 --resume --rawdevicewrite 0 1024 repart-block.bin - -When flashing is done, reboot the device. Note that if you have cellular version, -use ``tilapia.bct``. - -Flashing with a pre-loaded U-Boot -********************************* - -U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently -U-Boot supports bootmenu entry fastboot, which allows to write a processed copy -of U-Boot permanently into eMMC. + $ ./run_bootloader.sh -s T30 -t ./bct/grouper.bct --b u-boot-dtb-tegra.bin # or tilapia.bct While pre-loading U-Boot, hold the ``volume down`` button which will trigger the bootmenu. There, select ``fastboot`` using the volume and power buttons. @@ -120,8 +101,8 @@ bootmenu. Bootmenu contains entries to mount eMMC as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check the next chapter). -Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows -the user to use/partition it in any way the user desires. +Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and +allows the user to use/partition it in any way the user desires. Self Upgrading -------------- diff --git a/doc/board/asus/transformer_t20.rst b/doc/board/asus/transformer_t20.rst index 4f4f893c3a8..2b721b4c076 100644 --- a/doc/board/asus/transformer_t20.rst +++ b/doc/board/asus/transformer_t20.rst @@ -5,7 +5,8 @@ U-Boot for the ASUS Eee Pad Transformer device family ``DISCLAMER!`` Moving your ASUS Eee Pad Transformer/Slider to use U-Boot assumes replacement of the vendor ASUS bootloader. Vendor Android firmwares -will no longer be able to run on the device. This replacement IS reversible. +will no longer be able to run on the device. This replacement IS reversible +if you have backups. Quick Start ----------- @@ -40,61 +41,46 @@ in re-crypt repo issues. NOT HERE! re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form usable by device. This process is required only on the first installation or -to recover the device in case of a failed update. - -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. - -Processing for the NV3P protocol -******************************** +to recover the device in case of a failed update. You need to know your device +individual SBK to continue. .. code-block:: bash $ git clone https://gitlab.com/grate-driver/re-crypt.git $ cd re-crypt # place your u-boot-dtb-tegra.bin here - $ ./re-crypt.py --dev tf101 - -The script will produce a ``repart-block.bin`` ready to flash. + $ ./re-crypt.py --dev tf101v1 --split # or tf101v2 or sl101 as --dev -Processing for pre-loaded U-Boot -******************************** - -The procedure is the same, but the ``--split`` argument is used with the -``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready -to flash. +The script will produce ``bct.img`` and ``ebt.img`` ready to flash. Flashing U-Boot into the eMMC ----------------------------- -``DISCLAMER!`` All questions related to NvFlash should be asked in the proper +``DISCLAMER!`` All questions related to fusee-tools should be asked in the proper place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. +Permanent installation can be performed by pre-loading just built U-Boot into RAM. +Bct and bootloader will end up in boot0 and boot1 partitions of eMMC. -Flashing with the NV3P protocol -******************************* +You have to clone and prepare fusee-tools from here: https://gitlab.com/grate-driver/fusee-tools +according to fusee-tools README to continue. -Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can -enter it either by using ``wheelie`` with the correct ``blob.bin`` file or by -pre-loading vendor bootloader with the Fusée Gelée. +Bootloader preloading is performed to device in APX/RCM mode connected to host +PC. This mode can be entered by holding ``power`` and ``volume up`` buttons on +turned off tablet connected to the host PC. Host PC should detect APX USB +device in ``lsusb``. -With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in -encrypted state in form, which can just be written RAW at the start of eMMC. +U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently +U-Boot supports bootmenu entry fastboot, which allows to write a processed copy +of U-Boot permanently into eMMC. This is how U-Boot can be preloaded using +fusee-tools: .. code-block:: bash - $ wheelie -1 --bl bootloader.bin --bct tf101.bct --odm 0x300d8011 || break - $ nvflash --resume --rawdevicewrite 0 2048 repart-block.bin - -When flashing is done, reboot the device. - -Flashing with a pre-loaded U-Boot -********************************* + $ ./utils/nvflash_t20 --setbct --bct ./bct/<dev>.bct --configfile ./utils/flash.cfg + --bl u-boot-dtb-tegra.bin --sbk <your sbk> --sync -U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently -U-Boot supports bootmenu entry fastboot, which allows to write a processed copy -of U-Boot permanently into eMMC. +Where <dev> is your devie codename, either ``tf101`` or ``sl101`` and <your sbk> is SBK +of your device in the form ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` While pre-loading U-Boot, hold the ``volume down`` button which will trigger the bootmenu. There, select ``fastboot`` using the volume and power buttons. @@ -117,8 +103,8 @@ device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check the next chapter). -Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows -the user to use/partition it in any way the user desires. +Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and +allows the user to use/partition it in any way the user desires. Self Upgrading -------------- diff --git a/doc/board/asus/transformer_t30.rst b/doc/board/asus/transformer_t30.rst index 012a38251aa..cab8b32f97e 100644 --- a/doc/board/asus/transformer_t30.rst +++ b/doc/board/asus/transformer_t30.rst @@ -5,7 +5,7 @@ U-Boot for the ASUS Transformer device family ``DISCLAMER!`` Moving your ASUS Transformer to use U-Boot assumes replacement of the vendor ASUS bootloader. Vendor Android firmwares will no longer be -able to run on the device. This replacement IS reversible. +able to run on the device. This replacement IS reversible if you have backups. Quick Start ----------- @@ -45,65 +45,51 @@ Process U-Boot in re-crypt repo issues. NOT HERE! re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form -usable by device. This process is required only on the first installation or -to recover the device in case of a failed update. You need to know your -tablet's individual SBK to continue. - -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. - -Processing for the NV3P protocol -******************************** +usable by device. This process is required only on the first installation or to +recover the device in case of a failed update. You need to know your device +individual SBK to continue. .. code-block:: bash $ git clone https://gitlab.com/grate-driver/re-crypt.git $ cd re-crypt # place your u-boot-dtb-tegra.bin here - $ ./re-crypt.py --dev tf201 --sbk <your sbk> + $ ./re-crypt.py --dev tf201 --sbk <your sbk> --split where SBK has next form ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` -The script will produce a ``repart-block.bin`` ready to flash. +The script will produce ``bct.img`` and ``ebt.img`` ready to flash. -Processing for pre-loaded U-Boot -******************************** - -The procedure is the same, but the ``--split`` argument is used with the -``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready -to flash. +``NOTE!`` If you have TF700T it may have different sizes of boot0/boot1 partitions, +re-crypt sets default boot partition size to 2MB and if you have different size +add ``--bootsize`` key with yout boot partition size in bytes to the command. Flashing U-Boot into the eMMC ----------------------------- -``DISCLAMER!`` All questions related to NvFlash should be asked in the proper +``DISCLAMER!`` All questions related to fusee-tools should be asked in the proper place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. +Permanent installation can be performed by pre-loading just built U-Boot into RAM. +Bct and bootloader will end up in boot0 and boot1 partitions of eMMC. -Flashing with the NV3P protocol -******************************* +You have to clone and prepare fusee-tools from here: https://gitlab.com/grate-driver/fusee-tools +according to fusee-tools README to continue. -Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can -enter it by pre-loading vendor bootloader with the Fusée Gelée. +Bootloader preloading is performed to device in APX/RCM mode connected to host +PC. This mode can be entered by holding ``power`` and ``volume up`` buttons on +turned off tablet connected to the host PC. Host PC should detect APX USB +device in ``lsusb``. -With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in -encrypted state in form, which can just be written RAW at the start of eMMC. +U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently +U-Boot supports bootmenu entry fastboot, which allows to write a processed copy +of U-Boot permanently into eMMC. This is how U-Boot can be preloaded using +fusee-tools: .. code-block:: bash - $ ./run_bootloader.sh -s T30 -t ./bct/tf201.bct -b android_bootloader.bin - $ ./utiils/nvflash_v1.13.87205 --resume --rawdevicewrite 0 1024 repart-block.bin - -When flashing is done, reboot the device. Note that you should adjust bct file -name according to your device. + $ ./run_bootloader.sh -s T30 -t ./bct/<dev>.bct --b u-boot-dtb-tegra.bin -Flashing with a pre-loaded U-Boot -********************************* - -U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently -U-Boot supports bootmenu entry fastboot, which allows to write a processed copy -of U-Boot permanently into eMMC. +Where <dev> is your devie codename (``tf201``, ``tf300t``, ``tf700t`` etc.). While pre-loading U-Boot, hold the ``volume down`` button which will trigger the bootmenu. There, select ``fastboot`` using the volume and power buttons. @@ -124,6 +110,14 @@ Some of Transformers use a separate 4 MB SPI flash, which contains all data required for boot. It is flashed from within U-Boot itself, preloaded into RAM using Fusée Gelée. +Create ``repart-block.bin`` using re-crypt without ``--split`` key: + +.. code-block:: bash + + $ git clone https://gitlab.com/grate-driver/re-crypt.git + $ cd re-crypt # place your u-boot-dtb-tegra.bin here + $ ./re-crypt.py --dev tf600t --sbk <your sbk> + After creating your ``repart-block.bin`` you have to place it on a 1st partition of microSD card formated in fat. Then insert this microSD card into your tablet and boot it using Fusée Gelée and U-Boot, which was included into @@ -147,8 +141,8 @@ device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check the next chapter). -Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows -the user to use/partition it in any way the user desires. +Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and +allows the user to use/partition it in any way the user desires. Self Upgrading -------------- diff --git a/doc/board/htc/endeavoru.rst b/doc/board/htc/endeavoru.rst index 53df2d09a6f..415356da4e5 100644 --- a/doc/board/htc/endeavoru.rst +++ b/doc/board/htc/endeavoru.rst @@ -3,9 +3,9 @@ U-Boot for the HTC One X (endeavoru) ==================================== -``DISCLAMER!`` Moving your HTC ONe X to use U-Boot assumes replacement of the +``DISCLAMER!`` Moving your HTC One X to use U-Boot assumes replacement of the vendor hboot. Vendor android firmwares will no longer be able to run on the -device. This replacement IS reversible. +device. This replacement IS reversible if you have backups. Quick Start ----------- @@ -35,61 +35,42 @@ Process U-Boot in re-crypt repo issues. NOT HERE! re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form -usable by device. This process is required only on the first installation or -to recover the device in case of a failed update. - -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. - -Processing for the NV3P protocol -******************************** +usable by device. This process is required only on the first installation or to +recover the device in case of a failed update. .. code-block:: bash $ git clone https://gitlab.com/grate-driver/re-crypt.git $ cd re-crypt # place your u-boot-dtb-tegra.bin here - $ ./re-crypt.py --dev endeavoru - -The script will produce a ``repart-block.bin`` ready to flash. + $ ./re-crypt.py --dev endeavoru --split -Processing for pre-loaded U-Boot -******************************** - -The procedure is the same, but the ``--split`` argument is used with the -``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready -to flash. +The script will produce ``bct.img`` and ``ebt.img`` ready to flash. Flashing U-Boot into the eMMC ----------------------------- -``DISCLAMER!`` All questions related to NvFlash should be asked in the proper +``DISCLAMER!`` All questions related to fusee-tools should be asked in the proper place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. +Permanent installation can be performed by pre-loading just built U-Boot into RAM. +Bct and bootloader will end up in boot0 and boot1 partitions of eMMC. -Flashing with the NV3P protocol -******************************* +You have to clone and prepare fusee-tools from here: https://gitlab.com/grate-driver/fusee-tools +according to fusee-tools README to continue. -Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can -enter it by pre-loading vendor bootloader with the Fusée Gelée. +Bootloader preloading is performed to device in APX/RCM mode connected to host +PC. For HTC One X (endeavoru) this mode can be entered using ``fastboot oem rcm`` +command from modified S-OFF bootloader or using testpad on motherboard. Host PC +should detect APX USB device in ``lsusb``. -With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in -encrypted state in form, which can just be written RAW at the start of eMMC. +U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently +U-Boot supports bootmenu entry fastboot, which allows to write a processed copy +of U-Boot permanently into eMMC. This is how U-Boot can be preloaded using +fusee-tools: .. code-block:: bash - $ ./run_bootloader.sh -s T30 -t ./bct/endeavoru.bct -b android_bootloader.bin - $ ./utiils/nvflash_v1.13.87205 --resume --rawdevicewrite 0 1024 repart-block.bin - -When flashing is done, reboot the device. - -Flashing with a pre-loaded U-Boot -********************************* - -U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently -U-Boot supports bootmenu entry fastboot, which allows to write a processed copy -of U-Boot permanently into eMMC. + $ ./run_bootloader.sh -s T30 -t ./bct/endeavoru.bct --b u-boot-dtb-tegra.bin While pre-loading U-Boot, hold the ``volume down`` button which will trigger the bootmenu. There, select ``fastboot`` using the volume and power buttons. @@ -112,8 +93,8 @@ bootmenu. Bootmenu contains entries to mount eMMC as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check the next chapter). -Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows -the user to use/partition it in any way the user desires. +Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and +allows the user to use/partition it in any way the user desires. Self Upgrading -------------- diff --git a/doc/board/lg/star.rst b/doc/board/lg/star.rst index 9e480929182..580a6ee9468 100644 --- a/doc/board/lg/star.rst +++ b/doc/board/lg/star.rst @@ -5,7 +5,7 @@ U-Boot for the LG Optimus 2X P990 ``DISCLAMER!`` Moving your device to use U-Boot assumes replacement of the vendor bootloader. Vendor Android firmwares will no longer be able to run on -the device. This replacement IS reversible. +the device. This replacement IS reversible if you have backups. Quick Start ----------- @@ -35,62 +35,42 @@ Process U-Boot in re-crypt repo issues. NOT HERE! re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form -usable by device. This process is required only on the first installation or -to recover the device in case of a failed update. - -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. - -Processing for the NV3P protocol -******************************** +usable by device. This process is required only on the first installation or to +recover the device in case of a failed update. .. code-block:: bash $ git clone https://gitlab.com/grate-driver/re-crypt.git $ cd re-crypt # place your u-boot-dtb-tegra.bin here - $ ./re-crypt.py --dev star - -The script will produce a ``repart-block.bin`` ready to flash. + $ ./re-crypt.py --dev star --split -Processing for pre-loaded U-Boot -******************************** - -The procedure is the same, but the ``--split`` argument is used with the -``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready -to flash. +The script will produce ``bct.img`` and ``ebt.img`` ready to flash. Flashing U-Boot into the eMMC ----------------------------- -``DISCLAMER!`` All questions related to NvFlash should be asked in the proper +``DISCLAMER!`` All questions related to fusee-tools should be asked in the proper place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. +Permanent installation can be performed by pre-loading just built U-Boot into RAM. +Bct and bootloader will end up in boot0 and boot1 partitions of eMMC. -Flashing with the NV3P protocol -******************************* +You have to clone and prepare fusee-tools from here: https://gitlab.com/grate-driver/fusee-tools +according to fusee-tools README to continue. Additionally you must install ``tegrarcm``. -Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can -enter it by pre-loading vendor bootloader with nvflash. +Bootloader preloading is performed to device in APX/RCM mode connected to host +PC. This mode can be entered by holding ``power`` and both volume buttons on +turned off phone connected to the host PC. Host PC should detect APX USB device +in ``lsusb``. -With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in -encrypted state in form, which can just be written RAW at the start of eMMC. +U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently +U-Boot supports bootmenu entry fastboot, which allows to write a processed copy +of U-Boot permanently into eMMC. This is how U-Boot can be preloaded using +fusee-tools: .. code-block:: bash - $ ./nvflash_v1.13.87205 --bct star.bct --setbct --odmdata 0xC8000 - --configfile flash.cfg --bl android_bootloader.bin --sync - $ ./utiils/nvflash_v1.13.87205 --resume --rawdevicewrite 0 2048 repart-block.bin - -When flashing is done, reboot the device. - -Flashing with a pre-loaded U-Boot -********************************* - -U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently -U-Boot supports bootmenu entry fastboot, which allows to write a processed copy -of U-Boot permanently into eMMC. + $ tegrarcm --bct ./bct/star.bct --bootloader u-boot-dtb-tegra.bin --loadaddr 0x108000 While pre-loading U-Boot, hold the ``volume down`` button which will trigger the bootmenu. There, select ``fastboot`` using the volume and power buttons. @@ -113,8 +93,8 @@ device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check the next chapter). -Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows -the user to use/partition it in any way the user desires. +Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and +allows the user to use/partition it in any way the user desires. Self Upgrading -------------- diff --git a/doc/board/lg/x3_t30.rst b/doc/board/lg/x3_t30.rst index 9ff75034b72..45a75f6d57f 100644 --- a/doc/board/lg/x3_t30.rst +++ b/doc/board/lg/x3_t30.rst @@ -5,7 +5,7 @@ U-Boot for the LG X3 T30 device family ``DISCLAMER!`` Moving your LG P880 or P895 to use U-Boot assumes replacement of the vendor LG bootloader. Vendor android firmwares will no longer be able -to run on the device. This replacement IS reversible. +to run on the device. This replacement IS reversible if you have backups. Quick Start ----------- @@ -38,62 +38,42 @@ Process U-Boot in re-crypt repo issues. NOT HERE! re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form -usable by device. This process is required only on the first installation or -to recover the device in case of a failed update. - -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. - -Processing for the NV3P protocol -******************************** +usable by device. This process is required only on the first installation or to +recover the device in case of a failed update. .. code-block:: bash $ git clone https://gitlab.com/grate-driver/re-crypt.git $ cd re-crypt # place your u-boot-dtb-tegra.bin here - $ ./re-crypt.py --dev p895 - -The script will produce a ``repart-block.bin`` ready to flash. + $ ./re-crypt.py --dev p895 --split # or --dev p880 -Processing for pre-loaded U-Boot -******************************** - -The procedure is the same, but the ``--split`` argument is used with the -``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready -to flash. +The script will produce ``bct.img`` and ``ebt.img`` ready to flash. Flashing U-Boot into the eMMC ----------------------------- -``DISCLAMER!`` All questions related to NvFlash should be asked in the proper +``DISCLAMER!`` All questions related to fusee-tools should be asked in the proper place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. +Permanent installation can be performed by pre-loading just built U-Boot into RAM. +Bct and bootloader will end up in boot0 and boot1 partitions of eMMC. -Flashing with the NV3P protocol -******************************* +You have to clone and prepare fusee-tools from here: https://gitlab.com/grate-driver/fusee-tools +according to fusee-tools README to continue. -Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can -enter it by pre-loading vendor bootloader with the Fusée Gelée. +Bootloader preloading is performed to device in APX/RCM mode connected to host +PC. This mode can be entered by holding ``power`` and both buttons on turned +off phone connected to the host PC. Host PC should detect APX USB device in +``lsusb``. -With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in -encrypted state in form, which can just be written RAW at the start of eMMC. +U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently +U-Boot supports bootmenu entry fastboot, which allows to write a processed copy +of U-Boot permanently into eMMC. This is how U-Boot can be preloaded using +fusee-tools: .. code-block:: bash - $ ./run_bootloader.sh -s T30 -t ./bct/p895.bct -b android_bootloader.bin - $ ./utiils/nvflash_v1.13.87205 --resume --rawdevicewrite 0 1024 repart-block.bin - -When flashing is done, reboot the device. Note that if you have Optimus 4x HD, -use ``p880.bct``. - -Flashing with a pre-loaded U-Boot -********************************* - -U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently -U-Boot supports bootmenu entry fastboot, which allows to write a processed copy -of U-Boot permanently into eMMC. + $ ./run_bootloader.sh -s T30 -t ./bct/p895.bct --b u-boot-dtb-tegra.bin # or p880.bct While pre-loading U-Boot, hold the ``volume down`` button which will trigger the bootmenu. There, select ``fastboot`` using the volume and power buttons. @@ -116,8 +96,8 @@ bootmenu. Bootmenu contains entries to mount eMMC as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check the next chapter). -Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows -the user to use/partition it in any way the user desires. +Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and +allows the user to use/partition it in any way the user desires. Self Upgrading -------------- diff --git a/doc/board/microsoft/surface-2.rst b/doc/board/microsoft/surface-2.rst index 8185c6f5ae4..93d9d613cdb 100644 --- a/doc/board/microsoft/surface-2.rst +++ b/doc/board/microsoft/surface-2.rst @@ -33,7 +33,7 @@ directory with .. code-block:: bash - $ ./run_bootloader.sh -s T30 -t ./bct/surface-2.bct + $ ./run_bootloader.sh -s T114 -t ./bct/surface-2.bct To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on eMMC. Additionally, if the Volume Down button is pressed while loading, the diff --git a/doc/board/motorola/mot.rst b/doc/board/motorola/mot.rst index d0f89bcd357..80f85ec9dfd 100644 --- a/doc/board/motorola/mot.rst +++ b/doc/board/motorola/mot.rst @@ -67,9 +67,26 @@ Flashing U-Boot into the eMMC ``DISCLAMER!`` All questions related to fusee-tools should be asked in the proper place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! +Permanent installation can be performed by pre-loading just built U-Boot into RAM. +Bct and bootloader will end up in boot0 and boot1 partitions of eMMC. + +You have to clone and prepare fusee-tools from here: https://gitlab.com/grate-driver/fusee-tools +according to fusee-tools README to continue. + +Bootloader preloading is performed to device in APX/RCM mode connected to host +PC. For Motorola Atrix 4G (MB860) and Droid X2 (MB870) this mode can be entered +from vendor bootloader menu and with special cable from prerequisites chapter. +Host PC should detect APX USB device in ``lsusb``. + U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently U-Boot supports bootmenu entry fastboot, which allows to write a processed copy -of U-Boot permanently into eMMC. +of U-Boot permanently into eMMC. This is how U-Boot can be preloaded using +fusee-tools: + +.. code-block:: bash + + $ ./utils/nvflash_t20 --setbct --bct ./bct/olympus.bct --configfile ./utils/flash.cfg + --bl u-boot-dtb-tegra.bin --sbk <your sbk> --sync While pre-loading U-Boot, hold the ``volume down`` button which will trigger the bootmenu. There, select ``fastboot`` using the volume and power buttons. @@ -92,8 +109,8 @@ device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check the next chapter). -Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows -the user to use/partition it in any way the user desires. +Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and +allows the user to use/partition it in any way the user desires. Self Upgrading -------------- diff --git a/doc/board/ouya/ouya.rst b/doc/board/ouya/ouya.rst index 641affc6294..6cc68b01f90 100644 --- a/doc/board/ouya/ouya.rst +++ b/doc/board/ouya/ouya.rst @@ -5,7 +5,7 @@ U-Boot for the Ouya Game Console (ouya) ``DISCLAMER!`` Moving your Ouya to use U-Boot assumes replacement of the vendor bootloader. Vendor android firmwares will no longer be able to run on the -device. This replacement IS reversible. +device. This replacement IS reversible if you have backups. Quick Start ----------- @@ -35,62 +35,44 @@ Process U-Boot in re-crypt repo issues. NOT HERE! re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form -usable by device. This process is required only on the first installation or -to recover the device in case of a failed update. - -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. - -Processing for the NV3P protocol -******************************** +usable by device. This process is required only on the first installation or to +recover the device in case of a failed update. You need to know your device +individual SBK to continue. .. code-block:: bash $ git clone https://gitlab.com/grate-driver/re-crypt.git $ cd re-crypt # place your u-boot-dtb-tegra.bin here - $ ./re-crypt.py --dev ouya - -The script will produce a ``repart-block.bin`` ready to flash. + $ ./re-crypt.py --dev ouya --sbk <your sbk> --split -Processing for pre-loaded U-Boot -******************************** +where SBK has next form ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` -The procedure is the same, but the ``--split`` argument is used with the -``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready -to flash. +The script will produce ``bct.img`` and ``ebt.img`` ready to flash. Flashing U-Boot into the eMMC ----------------------------- -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. Regardless of the method bct and bootloader -will end up in boot0 and boot1 partitions of eMMC. - -Flashing with the NV3P protocol -******************************* - -``DISCLAMER!`` All questions related to NvFlash should be asked in the proper +``DISCLAMER!`` All questions related to fusee-tools should be asked in the proper place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! -Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can -enter it by pre-loading vendor bootloader with the Fusée Gelée. - -With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in -encrypted state in form, which can just be written RAW at the start of eMMC. +Permanent installation can be performed by pre-loading just built U-Boot into RAM. +Bct and bootloader will end up in boot0 and boot1 partitions of eMMC. -.. code-block:: bash - - $ ./run_bootloader.sh -s T30 -t ./bct/ouya.bct -b android_bootloader.bin - $ ./utiils/nvflash_v1.13.87205 --resume --rawdevicewrite 0 1024 repart-block.bin - -When flashing is done, reboot the device. +You have to clone and prepare fusee-tools from here: https://gitlab.com/grate-driver/fusee-tools +according to fusee-tools README to continue. -Flashing with a pre-loaded U-Boot -********************************* +Bootloader preloading is performed to device in APX/RCM mode connected to host +PC. This mode can be entered from testpad on motherboard with device connected +to the host PC. Host PC should detect APX USB device in ``lsusb``. U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently U-Boot supports bootmenu entry fastboot, which allows to write a processed copy -of U-Boot permanently into eMMC. +of U-Boot permanently into eMMC. This is how U-Boot can be preloaded using +fusee-tools: + +.. code-block:: bash + + $ ./run_bootloader.sh -s T30 -t ./bct/ouya.bct --b u-boot-dtb-tegra.bin While pre-loading U-Boot, interrupt bootflow by pressing ``CTRL + C`` (USB keyboard must be plugged in before U-Boot is preloaded, else it will not work), input @@ -113,8 +95,8 @@ bootmenu provides entries to mount eMMC as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check the next chapter). -Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows -the user to use/partition it in any way the user desires. +Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and +allows the user to use/partition it in any way the user desires. Self Upgrading -------------- diff --git a/doc/board/samsung/n1.rst b/doc/board/samsung/n1.rst index 4dbb3141774..89bd2c8d6d1 100644 --- a/doc/board/samsung/n1.rst +++ b/doc/board/samsung/n1.rst @@ -5,7 +5,8 @@ U-Boot for the Samsung N1 device family ``DISCLAMER!`` Moving your Samsung Galaxy R (GT-I9103) or Samsung Captivate Glide (SGH-i927) to use U-Boot assumes replacement of the sboot. Vendor android firmwares -will no longer be able to run on the device. This replacement IS reversible. +will no longer be able to run on the device. This replacement IS reversible if you +have backups. Quick Start ----------- diff --git a/doc/board/wexler/qc750.rst b/doc/board/wexler/qc750.rst index 169629c7e47..8cf118032cf 100644 --- a/doc/board/wexler/qc750.rst +++ b/doc/board/wexler/qc750.rst @@ -5,7 +5,7 @@ U-Boot for the WEXLER QC750 tablet ``DISCLAMER!`` Moving your WEXLER QC750 to use U-Boot assumes replacement of the vendor bootloader. Vendor Android firmwares will no longer be able -to run on the device. This replacement IS reversible. +to run on the device. This replacement IS reversible if you have backups. Quick Start ----------- @@ -38,26 +38,13 @@ re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form usable by device. This process is required only on the first installation or to recover the device in case of a failed update. -Permanent installation can be performed either by using the tegrarcm or by -pre-loading just built U-Boot into RAM. - -Processing for the NV3P protocol -******************************** - .. code-block:: bash $ git clone https://gitlab.com/grate-driver/re-crypt.git $ cd re-crypt # place your u-boot-dtb-tegra.bin here - $ ./re-crypt.py --dev qc750 - -The script will produce a ``repart-block.bin`` ready to flash. + $ ./re-crypt.py --dev qc750 --split -Processing for pre-loaded U-Boot -******************************** - -The procedure is the same, but the ``--split`` argument is used with the -``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready -to flash. +The script will produce ``bct.img`` and ``ebt.img`` ready to flash. Flashing U-Boot into the eMMC ----------------------------- @@ -65,31 +52,24 @@ Flashing U-Boot into the eMMC ``DISCLAMER!`` All questions related to tegrarcm should be asked in the proper place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! -Permanent installation can be performed either by using the nv3p protocol or by -pre-loading just built U-Boot into RAM. +Permanent installation can be performed by pre-loading just built U-Boot into RAM. +Bct and bootloader will end up in boot0 and boot1 partitions of eMMC. -Flashing with the NV3P protocol -******************************* +You have to clone and prepare fusee-tools from here: https://gitlab.com/grate-driver/fusee-tools +according to fusee-tools README to continue. Additionally you must install ``tegrarcm``. -Nv3p is a custom Nvidia protocol used to recover bricked devices. Tegrarcm is -used to handle such state. +Bootloader preloading is performed to device in APX/RCM mode connected to host +PC. This mode can be entered via testpad on unpopulated RCM button on motherboard +on device connected to the host PC. Host PC should detect APX USB device in ``lsusb``. -With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in -encrypted state in form, which can just be written RAW at the start of eMMC. +U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently +U-Boot supports bootmenu entry fastboot, which allows to write a processed copy +of U-Boot permanently into eMMC. This is how U-Boot can be preloaded using +tegrarcm: .. code-block:: bash - $ tegrarcm --bct qc750.bct --bootloader android_bootloader.bin --loadaddr 0x80108000 - $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin - -When flashing is done, reboot the device. - -Flashing with a pre-loaded U-Boot -********************************* - -U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently -U-Boot supports bootmenu entry fastboot, which allows to write a processed copy -of U-Boot permanently into eMMC. + $ tegrarcm --bct ./bct/qc750.bct --bootloader u-boot-dtb-tegra.bin --loadaddr 0x80108000 While pre-loading U-Boot, hold the ``volume down`` button which will trigger the bootmenu. There, select ``fastboot`` using the volume and power buttons. @@ -112,8 +92,8 @@ device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check the next chapter). -Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows -the user to use/partition it in any way the user desires. +Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and +allows the user to use/partition it in any way the user desires. Self Upgrading -------------- diff --git a/doc/board/xiaomi/mocha.rst b/doc/board/xiaomi/mocha.rst index 230081e3287..6339e4eb574 100644 --- a/doc/board/xiaomi/mocha.rst +++ b/doc/board/xiaomi/mocha.rst @@ -60,11 +60,15 @@ installation or to recover the device in case of a failed update. The script will produce ``bct.img`` and ``ebt.img`` ready to flash. -Permanent installation can be performed by pre-loading just built U-Boot -into RAM via tegrarcm. While pre-loading U-Boot, hold the ``volume down`` -button which will trigger the bootmenu. There, select ``fastboot`` using -the volume and power buttons. +Permanent installation can be performed by pre-loading just built U-Boot into RAM. +Bct and bootloader will end up in boot0 and boot1 partitions of eMMC. +Bootloader preloading is performed to device in APX/RCM mode connected to host +PC. This mode can be entered via testad on motherboard on turned off device +connected to the host PC. Host PC should detect APX USB device in ``lsusb``. + +While pre-loading U-Boot, hold the ``volume down`` button which will trigger +the bootmenu. There, select ``fastboot`` using the volume and power buttons. After, on host PC, do: .. code-block:: bash diff --git a/drivers/input/cpcap_pwrbutton.c b/drivers/input/cpcap_pwrbutton.c index c8ad39d33ca..ef6311bbfc5 100644 --- a/drivers/input/cpcap_pwrbutton.c +++ b/drivers/input/cpcap_pwrbutton.c @@ -76,7 +76,7 @@ static int cpcap_pwrbutton_of_to_plat(struct udevice *dev) /* Check interrupt parent, driver supports only CPCAP as parent */ irq_parent = ofnode_parse_phandle(dev_ofnode(dev), "interrupt-parent", 0); - if (!ofnode_device_is_compatible(irq_parent, "motorola,cpcap")) + if (!strstr(ofnode_get_name(irq_parent), "cpcap")) return -EINVAL; ret = dev_read_u32(dev, "interrupts", &irq_desc); @@ -87,9 +87,7 @@ static int cpcap_pwrbutton_of_to_plat(struct udevice *dev) priv->bank = irq_desc / 16; priv->id = irq_desc % 16; - ret = dev_read_u32(dev, "linux,code", &priv->keycode); - if (ret) - return ret; + priv->keycode = dev_read_u32_default(dev, "linux,code", KEY_POWER); priv->old_state = false; priv->skip = false; diff --git a/drivers/power/pmic/cpcap.c b/drivers/power/pmic/cpcap.c index f2076afff43..b9d783773ed 100644 --- a/drivers/power/pmic/cpcap.c +++ b/drivers/power/pmic/cpcap.c @@ -14,7 +14,9 @@ static const struct pmic_child_info pmic_children_info[] = { { .prefix = "sw", .driver = CPCAP_SW_DRIVER }, + { .prefix = "SW", .driver = CPCAP_SW_DRIVER }, { .prefix = "v", .driver = CPCAP_LDO_DRIVER }, + { .prefix = "V", .driver = CPCAP_LDO_DRIVER }, { }, }; @@ -112,6 +114,8 @@ static struct dm_pmic_ops cpcap_ops = { static const struct udevice_id cpcap_ids[] = { { .compatible = "motorola,cpcap" }, { .compatible = "st,6556002" }, + { .compatible = "motorola,mapphone-cpcap" }, + { .compatible = "motorola,mot-cpcap" }, { } }; diff --git a/drivers/power/pmic/max77663.c b/drivers/power/pmic/max77663.c index c2a7cbf7e40..a06042e2918 100644 --- a/drivers/power/pmic/max77663.c +++ b/drivers/power/pmic/max77663.c @@ -46,7 +46,9 @@ static int max77663_bind(struct udevice *dev) ofnode regulators_node; int children, ret; - if (IS_ENABLED(CONFIG_SYSRESET_MAX77663)) { + if (IS_ENABLED(CONFIG_SYSRESET_MAX77663) && + (dev_read_bool(dev, "maxim,system-power-controller") || + dev_read_bool(dev, "system-power-controller"))) { ret = device_bind_driver_to_node(dev, MAX77663_RST_DRIVER, "sysreset", dev_ofnode(dev), NULL); diff --git a/drivers/power/pmic/max8907.c b/drivers/power/pmic/max8907.c index a7ef70177de..34bef0c8cd6 100644 --- a/drivers/power/pmic/max8907.c +++ b/drivers/power/pmic/max8907.c @@ -48,7 +48,8 @@ static int max8907_bind(struct udevice *dev) int children, ret; if (IS_ENABLED(CONFIG_SYSRESET_MAX8907) && - dev_read_bool(dev, "maxim,system-power-controller")) { + (dev_read_bool(dev, "maxim,system-power-controller") || + dev_read_bool(dev, "system-power-controller"))) { ret = device_bind_driver_to_node(dev, MAX8907_RST_DRIVER, "sysreset", dev_ofnode(dev), NULL); diff --git a/drivers/power/pmic/palmas.c b/drivers/power/pmic/palmas.c index 37d4190fabe..e5b497dfc39 100644 --- a/drivers/power/pmic/palmas.c +++ b/drivers/power/pmic/palmas.c @@ -48,7 +48,9 @@ static int palmas_bind(struct udevice *dev) ofnode subnode, gpio_node; int children, ret; - if (IS_ENABLED(CONFIG_SYSRESET_PALMAS)) { + if (IS_ENABLED(CONFIG_SYSRESET_PALMAS) && + (dev_read_bool(dev, "ti,system-power-controller") || + dev_read_bool(dev, "system-power-controller"))) { ret = device_bind_driver_to_node(dev, PALMAS_RST_DRIVER, "sysreset", dev_ofnode(dev), NULL); diff --git a/drivers/power/pmic/pmic_tps65910_dm.c b/drivers/power/pmic/pmic_tps65910_dm.c index de8d805566a..bce35603275 100644 --- a/drivers/power/pmic/pmic_tps65910_dm.c +++ b/drivers/power/pmic/pmic_tps65910_dm.c @@ -61,7 +61,9 @@ static int pmic_tps65910_bind(struct udevice *dev) ofnode regulators_node; int children, ret; - if (IS_ENABLED(CONFIG_SYSRESET_TPS65910)) { + if (IS_ENABLED(CONFIG_SYSRESET_TPS65910) && + (dev_read_bool(dev, "ti,system-power-controller") || + dev_read_bool(dev, "system-power-controller"))) { ret = device_bind_driver(dev, TPS65910_RST_DRIVER, "sysreset", NULL); if (ret) { diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c index d11f7a7886e..95b71d2fe49 100644 --- a/drivers/power/pmic/rk8xx.c +++ b/drivers/power/pmic/rk8xx.c @@ -220,7 +220,9 @@ static int rk8xx_bind(struct udevice *dev) debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); - if (CONFIG_IS_ENABLED(SYSRESET)) { + if (CONFIG_IS_ENABLED(SYSRESET) && + (dev_read_bool(dev, "rockchip,system-power-controller") || + dev_read_bool(dev, "system-power-controller"))) { ret = device_bind_driver_to_node(dev, "rk8xx_sysreset", "rk8xx_sysreset", dev_ofnode(dev), NULL); diff --git a/drivers/power/pmic/tps80031.c b/drivers/power/pmic/tps80031.c index a2f935b0c6d..6004a14cd6c 100644 --- a/drivers/power/pmic/tps80031.c +++ b/drivers/power/pmic/tps80031.c @@ -46,7 +46,9 @@ static int tps80031_bind(struct udevice *dev) ofnode regulators_node; int children, ret; - if (IS_ENABLED(CONFIG_SYSRESET_TPS80031)) { + if (IS_ENABLED(CONFIG_SYSRESET_TPS80031) && + (dev_read_bool(dev, "ti,system-power-controller") || + dev_read_bool(dev, "system-power-controller"))) { ret = device_bind_driver(dev, TPS80031_RST_DRIVER, "sysreset", NULL); if (ret) { diff --git a/drivers/power/regulator/cpcap_regulator.c b/drivers/power/regulator/cpcap_regulator.c index 04cd6651374..0fbce57048c 100644 --- a/drivers/power/regulator/cpcap_regulator.c +++ b/drivers/power/regulator/cpcap_regulator.c @@ -55,7 +55,7 @@ #define CPCAP_REG(_reg, _assignment_reg, _assignment_mask, _mode_mask, \ _volt_mask, _volt_shft, _mode_val, _off_mode_val, _val_tbl, \ - _mode_cntr, _volt_trans_time, _turn_on_time, _bit_offset) { \ + _mode_cntr, _volt_trans_time, _turn_on_time) { \ .reg = CPCAP_REG_##_reg, \ .assignment_reg = CPCAP_REG_##_assignment_reg, \ .assignment_mask = CPCAP_BIT_##_assignment_mask, \ @@ -69,60 +69,59 @@ .mode_cntr = _mode_cntr, \ .volt_trans_time = _volt_trans_time, \ .turn_on_time = _turn_on_time, \ - .bit_offset_from_cpcap_lowest_voltage = _bit_offset, \ } static const struct cpcap_regulator_data tegra20_regulators[CPCAP_REGULATORS_COUNT] = { /* BUCK */ [CPCAP_SW1] = CPCAP_REG(S1C1, ASSIGN2, SW1_SEL, 0x6f00, 0x007f, - 0, 0x6800, 0, sw1_val_tbl, 0, 0, 1500, 0x0c), + 0, 0x6800, 0, sw_val_tbl, 0, 0, 1500), [CPCAP_SW2] = CPCAP_REG(S2C1, ASSIGN2, SW2_SEL, 0x6f00, 0x007f, - 0, 0x4804, 0, sw2_sw4_val_tbl, 0, 0, 1500, 0x18), + 0, 0x4804, 0, sw_val_tbl, 0, 0, 1500), [CPCAP_SW3] = CPCAP_REG(S3C, ASSIGN2, SW3_SEL, 0x0578, 0x0003, - 0, 0x043c, 0, sw3_val_tbl, 0, 0, 0, 0), + 0, 0x043c, 0, sw3_val_tbl, 0, 0, 0), [CPCAP_SW4] = CPCAP_REG(S4C1, ASSIGN2, SW4_SEL, 0x6f00, 0x007f, - 0, 0x4909, 0, sw2_sw4_val_tbl, 0, 0, 1500, 0x18), + 0, 0x4909, 0, sw_val_tbl, 0, 0, 1500), [CPCAP_SW5] = CPCAP_REG(S5C, ASSIGN2, SW5_SEL, 0x0028, 0x0000, - 0, 0x0020, 0, sw5_val_tbl, 0, 0, 1500, 0), + 0, 0x0020, 0, sw5_val_tbl, 0, 0, 1500), [CPCAP_SW6] = CPCAP_REG(S6C, ASSIGN2, SW6_SEL, 0x0000, 0x0000, - 0, 0, 0, unknown_val_tbl, 0, 0, 0, 0), + 0, 0, 0, unknown_val_tbl, 0, 0, 0), /* LDO */ [CPCAP_VCAM] = CPCAP_REG(VCAMC, ASSIGN2, VCAM_SEL, 0x0087, 0x0030, - 4, 0x7, 0, vcam_val_tbl, 0, 420, 1000, 0), + 4, 0x7, 0, vcam_val_tbl, 0, 420, 1000), [CPCAP_VCSI] = CPCAP_REG(VCSIC, ASSIGN3, VCSI_SEL, 0x0047, 0x0010, - 4, 0x7, 0, vcsi_val_tbl, 0, 350, 1000, 0), + 4, 0x7, 0, vcsi_val_tbl, 0, 350, 1000), [CPCAP_VDAC] = CPCAP_REG(VDACC, ASSIGN3, VDAC_SEL, 0x0087, 0x0030, - 4, 0x0, 0, vdac_val_tbl, 0, 420, 1000, 0), + 4, 0x0, 0, vdac_val_tbl, 0, 420, 1000), [CPCAP_VDIG] = CPCAP_REG(VDIGC, ASSIGN2, VDIG_SEL, 0x0087, 0x0030, - 4, 0x0, 0, vdig_val_tbl, 0, 420, 1000, 0), + 4, 0x0, 0, vdig_val_tbl, 0, 420, 1000), [CPCAP_VFUSE] = CPCAP_REG(VFUSEC, ASSIGN3, VFUSE_SEL, 0x00a0, 0x000f, - 0, 0x0, 0, vfuse_val_tbl, 0, 420, 1000, 0), + 0, 0x0, 0, vfuse_val_tbl, 0, 420, 1000), [CPCAP_VHVIO] = CPCAP_REG(VHVIOC, ASSIGN3, VHVIO_SEL, 0x0017, 0x0000, - 0, 0x2, 0, vhvio_val_tbl, 0, 0, 1000, 0), + 0, 0x2, 0, vhvio_val_tbl, 0, 0, 1000), [CPCAP_VSDIO] = CPCAP_REG(VSDIOC, ASSIGN2, VSDIO_SEL, 0x0087, 0x0038, - 3, 0x2, 0, vsdio_val_tbl, 0, 420, 1000, 0), + 3, 0x2, 0, vsdio_val_tbl, 0, 420, 1000), [CPCAP_VPLL] = CPCAP_REG(VPLLC, ASSIGN3, VPLL_SEL, 0x0047, 0x0018, - 3, 0x1, 0, vpll_val_tbl, 0, 420, 100, 0), + 3, 0x1, 0, vpll_val_tbl, 0, 420, 100), [CPCAP_VRF1] = CPCAP_REG(VRF1C, ASSIGN3, VRF1_SEL, 0x00ac, 0x0002, - 1, 0x0, 0, vrf1_val_tbl, 0, 10, 1000, 0), + 1, 0x0, 0, vrf1_val_tbl, 0, 10, 1000), [CPCAP_VRF2] = CPCAP_REG(VRF2C, ASSIGN3, VRF2_SEL, 0x0023, 0x0008, - 3, 0x0, 0, vrf2_val_tbl, 0, 10, 1000, 0), + 3, 0x0, 0, vrf2_val_tbl, 0, 10, 1000), [CPCAP_VRFREF] = CPCAP_REG(VRFREFC, ASSIGN3, VRFREF_SEL, 0x0023, 0x0008, - 3, 0x0, 0, vrfref_val_tbl, 0, 420, 100, 0), + 3, 0x0, 0, vrfref_val_tbl, 0, 420, 100), [CPCAP_VWLAN1] = CPCAP_REG(VWLAN1C, ASSIGN3, VWLAN1_SEL, 0x0047, 0x0010, - 4, 0x0, 0, vwlan1_val_tbl, 0, 420, 1000, 0), + 4, 0x0, 0, vwlan1_val_tbl, 0, 420, 1000), [CPCAP_VWLAN2] = CPCAP_REG(VWLAN2C, ASSIGN3, VWLAN2_SEL, 0x020c, 0x00c0, - 6, 0xd, 0, vwlan2_val_tbl, 0, 420, 1000, 0), + 6, 0xd, 0, vwlan2_val_tbl, 0, 420, 1000), [CPCAP_VSIM] = CPCAP_REG(VSIMC, ASSIGN3, NONE, 0x0023, 0x0008, - 3, 0x0, 0, vsim_val_tbl, 0, 420, 1000, 0), + 3, 0x0, 0, vsim_val_tbl, 0, 420, 1000), [CPCAP_VSIMCARD] = CPCAP_REG(VSIMC, ASSIGN3, NONE, 0x1e80, 0x0008, - 3, 0x1E00, 0, vsimcard_val_tbl, 0, 420, 1000, 0), + 3, 0x1E00, 0, vsimcard_val_tbl, 0, 420, 1000), [CPCAP_VVIB] = CPCAP_REG(VVIBC, ASSIGN3, VVIB_SEL, 0x0001, 0x000c, - 2, 0x1, 0, vvib_val_tbl, 0, 500, 500, 0), + 2, 0x1, 0, vvib_val_tbl, 0, 500, 500), [CPCAP_VUSB] = CPCAP_REG(VUSBC, ASSIGN3, VUSB_SEL, 0x011c, 0x0040, - 6, 0xc, 0, vusb_val_tbl, 0, 0, 1000, 0), + 6, 0xc, 0, vusb_val_tbl, 0, 0, 1000), [CPCAP_VAUDIO] = CPCAP_REG(VAUDIOC, ASSIGN4, VAUDIO_SEL, 0x0016, 0x0001, - 0, 0x5, 0, vaudio_val_tbl, 0, 0, 1000, 0), + 0, 0x5, 0, vaudio_val_tbl, 0, 0, 1000), }; static int cpcap_regulator_get_value(struct udevice *dev) @@ -139,7 +138,6 @@ static int cpcap_regulator_get_value(struct udevice *dev) return 0; value &= regulator->volt_mask; - value -= regulator->bit_offset_from_cpcap_lowest_voltage; return regulator->val_tbl[value >> volt_shift]; } @@ -164,7 +162,6 @@ static int cpcap_regulator_set_value(struct udevice *dev, int uV) value = regulator->val_tbl_sz; value <<= volt_shift; - value += regulator->bit_offset_from_cpcap_lowest_voltage; } ret = pmic_clrsetbits(dev->parent, regulator->reg, regulator->volt_mask, @@ -232,7 +229,7 @@ static int cpcap_regulator_probe(struct udevice *dev) for (id = 0; id < CPCAP_REGULATORS_COUNT; id++) if (cpcap_regulator_to_name[id]) - if (!strcmp(dev->name, cpcap_regulator_to_name[id])) + if (!strcasecmp(dev->name, cpcap_regulator_to_name[id])) break; switch (id) { diff --git a/drivers/pwm/tegra_pwm.c b/drivers/pwm/tegra_pwm.c index e3f1417f2ad..3d8f9daa2b0 100644 --- a/drivers/pwm/tegra_pwm.c +++ b/drivers/pwm/tegra_pwm.c @@ -4,38 +4,94 @@ */ #include <dm.h> +#include <clk.h> +#include <div64.h> #include <log.h> #include <pwm.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/pwm.h> +#include <linux/time.h> + +#define PWM_PDIV_WIDTH 8 +#define PWM_PDIV_MAX BIT(PWM_PDIV_WIDTH) +#define PWM_FDIV_WIDTH 13 struct tegra_pwm_priv { struct pwm_ctlr *regs; + u64 clk_rate; + u32 min_period_ns; + u8 polarity; }; +static int tegra_pwm_set_invert(struct udevice *dev, uint channel, bool polarity) +{ + struct tegra_pwm_priv *priv = dev_get_priv(dev); + + if (channel >= 4) + return -EINVAL; + + clrsetbits_8(&priv->polarity, BIT(channel), (polarity << channel)); + + return 0; +} + static int tegra_pwm_set_config(struct udevice *dev, uint channel, uint period_ns, uint duty_ns) { struct tegra_pwm_priv *priv = dev_get_priv(dev); struct pwm_ctlr *regs = priv->regs; - const u32 pwm_max_freq = dev_get_driver_data(dev); - uint pulse_width; + u64 pulse_width; u32 reg; + s64 rate; if (channel >= 4) return -EINVAL; debug("%s: Configure '%s' channel %u\n", __func__, dev->name, channel); - clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_PERIPH, pwm_max_freq); + if (period_ns < priv->min_period_ns) { + debug("%s: Channel %u period too low, period_ns %u minimum %u\n", + __func__, channel, period_ns, priv->min_period_ns); + return -EINVAL; + } + + /* + * Convert from duty_ns / period_ns to a fixed number of duty ticks + * per (1 << PWM_PDIV_WIDTH) cycles and make sure to round to the + * nearest integer during division. + */ + pulse_width = duty_ns * PWM_PDIV_MAX; + pulse_width = DIV_ROUND_CLOSEST_ULL(pulse_width, period_ns); + + if (priv->polarity & BIT(channel)) + pulse_width = PWM_PDIV_MAX - pulse_width; + + if (pulse_width > PWM_PDIV_MAX) { + debug("%s: Channel %u pulse_width too high %llu\n", + __func__, channel, pulse_width); + return -EINVAL; + } + + /* + * Since the actual PWM divider is the register's frequency divider + * field plus 1, we need to decrement to get the correct value to + * write to the register. + */ + rate = (priv->clk_rate * period_ns) / ((u64)NSEC_PER_SEC << PWM_PDIV_WIDTH) - 1; + if (rate < 0) { + debug("%s: Channel %u rate is not positive\n", __func__, channel); + return -EINVAL; + } - pulse_width = duty_ns * 255 / period_ns; + if (rate >> PWM_FDIV_WIDTH) { + debug("%s: Channel %u rate too high %llu\n", __func__, channel, rate); + return -EINVAL; + } reg = pulse_width << PWM_WIDTH_SHIFT; - reg |= 1 << PWM_DIVIDER_SHIFT; + reg |= rate << PWM_DIVIDER_SHIFT; reg |= PWM_ENABLE_MASK; writel(reg, ®s[channel].control); - debug("%s: pulse_width=%u\n", __func__, pulse_width); return 0; } @@ -63,9 +119,32 @@ static int tegra_pwm_of_to_plat(struct udevice *dev) return 0; } +static int tegra_pwm_probe(struct udevice *dev) +{ + struct tegra_pwm_priv *priv = dev_get_priv(dev); + const u32 pwm_max_freq = dev_get_driver_data(dev); + struct clk *clk; + + clk = devm_clk_get(dev, NULL); + if (IS_ERR(clk)) { + debug("%s: Could not get PWM clock: %ld\n", __func__, PTR_ERR(clk)); + return PTR_ERR(clk); + } + + priv->clk_rate = clock_start_periph_pll(clk->id, CLOCK_ID_PERIPH, + pwm_max_freq); + priv->min_period_ns = (NSEC_PER_SEC / (pwm_max_freq >> PWM_PDIV_WIDTH)) + 1; + + debug("%s: clk_rate = %llu min_period_ns = %u\n", __func__, + priv->clk_rate, priv->min_period_ns); + + return 0; +} + static const struct pwm_ops tegra_pwm_ops = { .set_config = tegra_pwm_set_config, .set_enable = tegra_pwm_set_enable, + .set_invert = tegra_pwm_set_invert, }; static const struct udevice_id tegra_pwm_ids[] = { @@ -80,5 +159,6 @@ U_BOOT_DRIVER(tegra_pwm) = { .of_match = tegra_pwm_ids, .ops = &tegra_pwm_ops, .of_to_plat = tegra_pwm_of_to_plat, + .probe = tegra_pwm_probe, .priv_auto = sizeof(struct tegra_pwm_priv), }; diff --git a/drivers/video/renesas-r61307.c b/drivers/video/renesas-r61307.c index ef6fab1e953..b643fd1db89 100644 --- a/drivers/video/renesas-r61307.c +++ b/drivers/video/renesas-r61307.c @@ -228,7 +228,7 @@ static int renesas_r61307_of_to_plat(struct udevice *dev) } priv->dig_cont_adj = dev_read_bool(dev, "renesas,contrast"); - priv->inversion = dev_read_bool(dev, "renesas,inversion"); + priv->inversion = dev_read_bool(dev, "renesas,column-inversion"); priv->gamma = dev_read_u32_default(dev, "renesas,gamma", 0); return 0; diff --git a/drivers/video/samsung-ltl106hl02.c b/drivers/video/samsung-ltl106hl02.c index 1efc9fca610..97881a1524e 100644 --- a/drivers/video/samsung-ltl106hl02.c +++ b/drivers/video/samsung-ltl106hl02.c @@ -93,9 +93,9 @@ static int samsung_ltl106hl02_of_to_plat(struct udevice *dev) } ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev, - "vdd-supply", &priv->vdd); + "power-supply", &priv->vdd); if (ret) - log_debug("%s: cannot get vdd-supply: error %d\n", + log_debug("%s: cannot get power-supply: error %d\n", __func__, ret); ret = gpio_request_by_name(dev, "reset-gpios", 0, diff --git a/include/power/cpcap.h b/include/power/cpcap.h index bb0e28cec55..b035b84840f 100644 --- a/include/power/cpcap.h +++ b/include/power/cpcap.h @@ -297,32 +297,21 @@ static const char * const cpcap_regulator_to_name[] = { }; static const u32 unknown_val_tbl[] = { 0, }; -static const u32 sw1_val_tbl[] = { 750000, 762500, 775000, 787500, 800000, - 812500, 825000, 837500, 850000, 862500, - 875000, 887500, 900000, 912500, 925000, - 937500, 950000, 962500, 975000, 987500, - 1000000, 1012500, 1025000, 1037500, - 1050000, 1062500, 1075000, 1087500, - 1100000, 1112500, 1125000, 1137500, - 1150000, 1162500, 1175000, 1187500, - 1200000, 1212500, 1225000, 1237500, - 1250000, 1262500, 1275000, 1287500, - 1300000, 1312500, 1325000, 1337500, - 1350000, 1362500, 1375000, 1387500, - 1400000, 1412500, 1425000, 1437500, - 1450000, 1462500, 1475000 }; -static const u32 sw2_sw4_val_tbl[] = { 900000, 912500, 925000, 937500, 950000, - 962500, 975000, 987500, 1000000, 1012500, - 1025000, 1037500, 1050000, 1062500, - 1075000, 1087500, 1100000, 1112500, - 1125000, 1137500, 1150000, 1162500, - 1175000, 1187500, 1200000, 1212500, - 1225000, 1237500, 1250000, 1262500, - 1275000, 1287500, 1300000, 1312500, - 1325000, 1337500, 1350000, 1362500, - 1375000, 1387500, 1400000, 1412500, - 1425000, 1437500, 1450000, 1462500, - 1475000 }; +static const u32 sw_val_tbl[] = { 600000, 612500, 625000, 637500, 650000, + 662500, 675000, 687500, 700000, 712500, + 725000, 737500, 750000, 762500, 775000, + 787500, 800000, 812500, 825000, 837500, + 850000, 862500, 875000, 887500, 900000, + 912500, 925000, 937500, 950000, 962500, + 975000, 987500, 1000000, 1012500, 1025000, + 1037500, 1050000, 1062500, 1075000, 1087500, + 1100000, 1112500, 1125000, 1137500, 1150000, + 1162500, 1175000, 1187500, 1200000, 1212500, + 1225000, 1237500, 1250000, 1262500, 1275000, + 1287500, 1300000, 1312500, 1325000, 1337500, + 1350000, 1362500, 1375000, 1387500, 1400000, + 1412500, 1425000, 1437500, 1450000, 1462500, + 1475000, }; static const u32 sw3_val_tbl[] = { 1350000, 1800000, 1850000, 1875000 }; static const u32 sw5_val_tbl[] = { 0, 5050000 }; static const u32 vcam_val_tbl[] = { 2600000, 2700000, 2800000, 2900000 }; @@ -361,13 +350,6 @@ struct cpcap_regulator_data { u32 mode_cntr; u32 volt_trans_time; /* in micro seconds */ u32 turn_on_time; /* in micro seconds */ - - /* - * Bit difference between lowest value in val_tbl and start of voltage - * table setting in cpcap. Use this for switchers that have many too - * many voltages to list in val_tbl. - */ - u32 bit_offset_from_cpcap_lowest_voltage; }; #endif /* _CPCAP_H_ */ |