diff options
| author | Tien Fong Chee <[email protected]> | 2025-02-18 16:34:56 +0800 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-02-25 10:53:53 -0600 |
| commit | fe41a5e1b991d8b38f1abfa91ec0630576ad574f (patch) | |
| tree | 6820113f4fdc09baad7d6cfbc9bd7117844e2a0e | |
| parent | f504e59e00e0afc66556eeed2d64191380c00178 (diff) | |
arm: dts: agilex5: Enable XGMAC
Enable XGMAC for SoCFPGA Agilex5 devkit.
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Tien Fong Chee <[email protected]>
| -rw-r--r-- | arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi index 9eb21d65428..540b2662283 100644 --- a/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi @@ -3,6 +3,7 @@ * U-Boot additions * * Copyright (C) 2024 Intel Corporation <www.intel.com> + * Copyright (C) 2025 Altera Corporation <www.altera.com> */ #include "socfpga_agilex5-u-boot.dtsi" @@ -122,3 +123,36 @@ bootph-all; }; +&gmac0 { + status = "okay"; + phy-mode = "rgmii"; + phy-handle = <&emac0_phy0>; + + max-frame-size = <9000>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwxgmac-mdio"; + emac0_phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "rgmii"; + phy-handle = <&emac2_phy0>; + + max-frame-size = <9000>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwxgmac-mdio"; + emac2_phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +}; |