diff options
| author | Tom Rini <[email protected]> | 2022-07-31 21:08:28 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2022-08-12 16:10:49 -0400 |
| commit | 4143a237947576b581eed1eaf88c207df80d418e (patch) | |
| tree | 3e8c198fc6f9d0906928377de928170df1786d2b /README | |
| parent | 1de46d91dddfd60107c665530aed6ac25f55960e (diff) | |
Convert CONFIG_SYS_FSL_PCIE_COMPAT to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_PCIE_COMPAT
To do this, introduce a choice and option for each of the strings used
and set CONFIG_SYS_FSL_PCIE_COMPAT based on that.
Signed-off-by: Tom Rini <[email protected]>
Diffstat (limited to 'README')
| -rw-r--r-- | README | 5 |
1 files changed, 0 insertions, 5 deletions
@@ -300,11 +300,6 @@ The following options need to be configured: system clock. On most PQ3 devices this is 8, on newer QorIQ devices it can be 16 or 32. The ratio varies from SoC to Soc. - CONFIG_SYS_FSL_PCIE_COMPAT - - Defines the string to utilize when trying to match PCIe device - tree nodes for the given platform. - CONFIG_SYS_FSL_ERRATUM_A004510 Enables a workaround for erratum A004510. If set, |