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authorTom Rini <[email protected]>2021-07-07 22:50:41 -0400
committerTom Rini <[email protected]>2021-07-07 22:50:41 -0400
commitbfb5bfa3c58adc2ef5dbd1bb95b79b31e0dc221c (patch)
tree21753c7f94144a286584c1f631ad9bde89a1a438 /README
parent7e58a3a148fb94e9ce09fb48d0ddd75c20ee7df9 (diff)
parent123dc510c6e79f0c94718e2e6b5e4074754aa629 (diff)
Merge branch '2021-07-07-remove-non-migrated-platforms'
- Remove a large number of platforms that did not migrate to DM_PCI or DM_USB by 2 years past the migration deadline and do not have a migration imminent.
Diffstat (limited to 'README')
-rw-r--r--README7
1 files changed, 1 insertions, 6 deletions
diff --git a/README b/README
index ad13092bbb7..1472b40bc45 100644
--- a/README
+++ b/README
@@ -423,8 +423,7 @@ The following options need to be configured:
CONFIG_SYS_FSL_DDR
Freescale DDR driver in use. This type of DDR controller is
- found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
- SoCs.
+ found in mpc83xx, mpc85xx as well as some ARM core SoCs.
CONFIG_SYS_FSL_DDR_ADDR
Freescale DDR memory-mapped register base.
@@ -630,10 +629,6 @@ The following options need to be configured:
controller register space
- Serial Ports:
- CONFIG_PL010_SERIAL
-
- Define this if you want support for Amba PrimeCell PL010 UARTs.
-
CONFIG_PL011_SERIAL
Define this if you want support for Amba PrimeCell PL011 UARTs.