arm: Remove strongarm support

There are no platforms using this architecture anymore, remove it.

Signed-off-by: Tom Rini <[email protected]>

4 files changed, 0 insertions, 266 deletions

diff --git a/arch/arm/cpu/sa1100/Makefile b/arch/arm/cpu/sa1100/Makefile
deleted file mode 100644
index 38193092cdb..00000000000
--- a/arch/arm/cpu/sa1100/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, [email protected].
-
-extra-y	= start.o
-
-obj-y	+= cpu.o
-obj-y	+= timer.o
diff --git a/arch/arm/cpu/sa1100/cpu.c b/arch/arm/cpu/sa1100/cpu.c
deleted file mode 100644
index 6f67f7fc228..00000000000
--- a/arch/arm/cpu/sa1100/cpu.c
+++ /dev/null
@@ -1,65 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <[email protected]>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <[email protected]>
- */
-
-/*
- * CPU specific code
- */
-
-#include <common.h>
-#include <command.h>
-#include <cpu_func.h>
-#include <irq_func.h>
-#include <asm/system.h>
-#include <asm/io.h>
-
-static void cache_flush(void);
-
-int cleanup_before_linux (void)
-{
-	/*
-	 * this function is called just before we call linux
-	 * it prepares the processor for linux
-	 *
-	 * just disable everything that can disturb booting linux
-	 */
-
-	disable_interrupts();
-
-	/* turn off I-cache */
-	icache_disable();
-	dcache_disable();
-
-	/* flush I-cache */
-	cache_flush();
-
-	return (0);
-}
-
-/* flush I/D-cache */
-static void cache_flush (void)
-{
-	unsigned long i = 0;
-
-	asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
-}
-
-#define RST_BASE 0x90030000
-#define RSRR	0x00
-#define RCSR	0x04
-
-__attribute__((noreturn)) void reset_cpu(void)
-{
-	/* repeat endlessly */
-	while (1) {
-		writel(0, RST_BASE + RCSR);
-		writel(1, RST_BASE + RSRR);
-	}
-}
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
deleted file mode 100644
index 2f84f20575c..00000000000
--- a/arch/arm/cpu/sa1100/start.S
+++ /dev/null
@@ -1,126 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- *  armboot - Startup Code for SA1100 CPU
- *
- *  Copyright (C) 1998	Dan Malek <[email protected]>
- *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
- *  Copyright (C) 2000	Wolfgang Denk <[email protected]>
- *  Copyright (c) 2001	Alex Züpke <[email protected]>
- */
-
-#include <asm-offsets.h>
-#include <config.h>
-
-/*
- *************************************************************************
- *
- * Startup Code (reset vector)
- *
- * do important init only if we don't start from memory!
- * relocate armboot to ram
- * setup stack
- * jump to second stage
- *
- *************************************************************************
- */
-
-	.globl	reset
-
-reset:
-	/*
-	 * set the cpu to SVC32 mode
-	 */
-	mrs	r0,cpsr
-	bic	r0,r0,#0x1f
-	orr	r0,r0,#0xd3
-	msr	cpsr,r0
-
-	/*
-	 * we do sys-critical inits only at reboot,
-	 * not when booting from ram!
-	 */
-#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
-	bl	cpu_init_crit
-#endif
-
-	bl	_main
-
-/*------------------------------------------------------------------------------*/
-
-	.globl	c_runtime_cpu_setup
-c_runtime_cpu_setup:
-
-	mov	pc, lr
-
-/*
- *************************************************************************
- *
- * CPU_init_critical registers
- *
- * setup important registers
- * setup memory timing
- *
- *************************************************************************
- */
-
-
-/* Interrupt-Controller base address */
-IC_BASE:	.word	0x90050000
-#define ICMR	0x04
-
-
-/* Reset-Controller */
-RST_BASE:		.word   0x90030000
-#define RSRR	0x00
-#define RCSR	0x04
-
-
-/* PWR */
-PWR_BASE:		.word   0x90020000
-#define PSPR    0x08
-#define PPCR    0x14
-cpuspeed:		.word   CONFIG_SYS_CPUSPEED
-
-
-cpu_init_crit:
-	/*
-	 * mask all IRQs
-	 */
-	ldr	r0, IC_BASE
-	mov	r1, #0x00
-	str	r1, [r0, #ICMR]
-
-	/* set clock speed */
-	ldr	r0, PWR_BASE
-	ldr	r1, cpuspeed
-	str	r1, [r0, #PPCR]
-
-#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
-	/*
-	 * before relocating, we have to setup RAM timing
-	 * because memory timing is board-dependend, you will
-	 * find a lowlevel_init.S in your board directory.
-	 */
-	mov	ip,	lr
-	bl	lowlevel_init
-	mov	lr,	ip
-#endif
-
-	/*
-	 * disable MMU stuff and enable I-cache
-	 */
-	mrc	p15,0,r0,c1,c0
-	bic	r0, r0, #0x00002000	@ clear bit 13 (X)
-	bic	r0, r0, #0x0000000f	@ clear bits 3-0 (WCAM)
-	orr	r0, r0, #0x00001000	@ set bit 12 (I) Icache
-	orr	r0, r0, #0x00000002	@ set bit 1 (A) Align
-	mcr	p15,0,r0,c1,c0
-
-	/*
-	 * flush v4 I/D caches
-	 */
-	mov	r0, #0
-	mcr	p15, 0, r0, c7, c7, 0	/* flush v3/v4 cache */
-	mcr	p15, 0, r0, c8, c7, 0	/* flush v4 TLB */
-
-	mov	pc, lr
diff --git a/arch/arm/cpu/sa1100/timer.c b/arch/arm/cpu/sa1100/timer.c
deleted file mode 100644
index a5cdaf5a66c..00000000000
--- a/arch/arm/cpu/sa1100/timer.c
+++ /dev/null
@@ -1,66 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <[email protected]>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <[email protected]>
- */
-
-#include <common.h>
-#include <SA-1100.h>
-#include <time.h>
-#include <linux/delay.h>
-
-static ulong get_timer_masked (void)
-{
-	return OSCR;
-}
-
-ulong get_timer (ulong base)
-{
-	return get_timer_masked ();
-}
-
-void __udelay(unsigned long usec)
-{
-	ulong tmo;
-	ulong endtime;
-	signed long diff;
-
-	if (usec >= 1000) {
-		tmo = usec / 1000;
-		tmo *= CONFIG_SYS_HZ;
-		tmo /= 1000;
-	} else {
-		tmo = usec * CONFIG_SYS_HZ;
-		tmo /= (1000*1000);
-	}
-
-	endtime = get_timer_masked () + tmo;
-
-	do {
-		ulong now = get_timer_masked ();
-		diff = endtime - now;
-	} while (diff >= 0);
-}
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
-	return get_timer(0);
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
-	return CONFIG_SYS_HZ;
-}