stv0991: Remove stv0991 board and architecture code

This architecture and related board are unmaintained currently and have
been for a long time. Remove them.

Signed-off-by: Tom Rini <[email protected]>

7 files changed, 0 insertions, 268 deletions

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 653eef8ad79..99cf9eb515f 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -37,7 +37,6 @@ obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/
 obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/
 obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/
 obj-$(if $(filter ls102xa,$(SOC)),y) += ls102xa/
-obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/
 obj-$(CONFIG_ARCH_SUNXI) += sunxi/
 obj-$(CONFIG_VF610) += vf610/
 obj-$(CONFIG_ARCH_S5P4418) += s5p4418/
diff --git a/arch/arm/cpu/armv7/stv0991/Makefile b/arch/arm/cpu/armv7/stv0991/Makefile
deleted file mode 100644
index 3be5eba4b12..00000000000
--- a/arch/arm/cpu/armv7/stv0991/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2014, STMicroelectronics - All Rights Reserved
-# Author(s): Vikas Manocha, <[email protected]> for STMicroelectronics.
-
-obj-y	:= timer.o clock.o pinmux.o reset.o
-obj-y	+= lowlevel.o
diff --git a/arch/arm/cpu/armv7/stv0991/clock.c b/arch/arm/cpu/armv7/stv0991/clock.c
deleted file mode 100644
index 1e35deed353..00000000000
--- a/arch/arm/cpu/armv7/stv0991/clock.c
+++ /dev/null
@@ -1,42 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <[email protected]> for STMicroelectronics.
- */
-
-#include <asm/io.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/stv0991_cgu.h>
-#include<asm/arch/stv0991_periph.h>
-
-static struct stv0991_cgu_regs *const stv0991_cgu_regs = \
-				(struct stv0991_cgu_regs *) (CGU_BASE_ADDR);
-
-void enable_pll1(void)
-{
-	/* pll1 already configured for 1000Mhz, just need to enable it */
-	writel(readl(&stv0991_cgu_regs->pll1_ctrl) & ~(0x01),
-			&stv0991_cgu_regs->pll1_ctrl);
-}
-
-void clock_setup(int peripheral)
-{
-	switch (peripheral) {
-	case UART_CLOCK_CFG:
-		writel(UART_CLK_CFG, &stv0991_cgu_regs->uart_freq);
-		break;
-	case ETH_CLOCK_CFG:
-		enable_pll1();
-		writel(ETH_CLK_CFG, &stv0991_cgu_regs->eth_freq);
-
-		/* Clock selection for ethernet tx_clk & rx_clk*/
-		writel((readl(&stv0991_cgu_regs->eth_ctrl) & ETH_CLK_MASK)
-				| ETH_CLK_CTRL, &stv0991_cgu_regs->eth_ctrl);
-		break;
-	case QSPI_CLOCK_CFG:
-		writel(QSPI_CLK_CTRL, &stv0991_cgu_regs->qspi_freq);
-		break;
-	default:
-		break;
-	}
-}
diff --git a/arch/arm/cpu/armv7/stv0991/lowlevel.S b/arch/arm/cpu/armv7/stv0991/lowlevel.S
deleted file mode 100644
index 5733eaa15c0..00000000000
--- a/arch/arm/cpu/armv7/stv0991/lowlevel.S
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2014 STMicroelectronics
- */
-
-#include <config.h>
-#include <linux/linkage.h>
-
-ENTRY(lowlevel_init)
-	mov	pc, lr
-ENDPROC(lowlevel_init)
diff --git a/arch/arm/cpu/armv7/stv0991/pinmux.c b/arch/arm/cpu/armv7/stv0991/pinmux.c
deleted file mode 100644
index 6c44ffe50e8..00000000000
--- a/arch/arm/cpu/armv7/stv0991/pinmux.c
+++ /dev/null
@@ -1,66 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <[email protected]> for STMicroelectronics.
- */
-
-#include <asm/io.h>
-#include <asm/arch/stv0991_creg.h>
-#include <asm/arch/stv0991_periph.h>
-#include <asm/arch/hardware.h>
-
-static struct stv0991_creg *const stv0991_creg = \
-			(struct stv0991_creg *)CREG_BASE_ADDR;
-
-int stv0991_pinmux_config(int peripheral)
-{
-	switch (peripheral) {
-	case UART_GPIOC_30_31:
-		/* SSDA/SSCL pad muxing to UART Rx/Dx */
-		writel((readl(&stv0991_creg->mux12) & GPIOC_31_MUX_MASK) |
-				CFG_GPIOC_31_UART_RX,
-				&stv0991_creg->mux12);
-		writel((readl(&stv0991_creg->mux12) & GPIOC_30_MUX_MASK) |
-				CFG_GPIOC_30_UART_TX,
-				&stv0991_creg->mux12);
-		/* SSDA/SSCL pad config to push pull*/
-		writel((readl(&stv0991_creg->cfg_pad6) & GPIOC_31_MODE_MASK) |
-				CFG_GPIOC_31_MODE_PP,
-				&stv0991_creg->cfg_pad6);
-		writel((readl(&stv0991_creg->cfg_pad6) & GPIOC_30_MODE_MASK) |
-				CFG_GPIOC_30_MODE_HIGH,
-				&stv0991_creg->cfg_pad6);
-		break;
-	case UART_GPIOB_16_17:
-		/* ethernet rx_6/7 to UART Rx/Dx */
-		writel((readl(&stv0991_creg->mux7) & GPIOB_17_MUX_MASK) |
-				CFG_GPIOB_17_UART_RX,
-				&stv0991_creg->mux7);
-		writel((readl(&stv0991_creg->mux7) & GPIOB_16_MUX_MASK) |
-				CFG_GPIOB_16_UART_TX,
-				&stv0991_creg->mux7);
-		break;
-	case ETH_GPIOB_10_31_C_0_4:
-		writel(readl(&stv0991_creg->mux6) & 0x000000FF,
-				&stv0991_creg->mux6);
-		writel(0x00000000, &stv0991_creg->mux7);
-		writel(0x00000000, &stv0991_creg->mux8);
-		writel(readl(&stv0991_creg->mux9) & 0xFFF00000,
-				&stv0991_creg->mux9);
-		/* Ethernet Voltage configuration to 1.8V*/
-		writel((readl(&stv0991_creg->vdd_pad1) & VDD_ETH_PS_MASK) |
-				ETH_VDD_CFG, &stv0991_creg->vdd_pad1);
-		writel((readl(&stv0991_creg->vdd_pad1) & VDD_ETH_PS_MASK) |
-				ETH_M_VDD_CFG, &stv0991_creg->vdd_pad1);
-
-		break;
-	case QSPI_CS_CLK_PAD:
-		writel((readl(&stv0991_creg->mux13) & FLASH_CS_NC_MASK) |
-				CFG_FLASH_CS_NC, &stv0991_creg->mux13);
-		writel((readl(&stv0991_creg->mux13) & FLASH_CLK_MASK) |
-				CFG_FLASH_CLK, &stv0991_creg->mux13);
-	default:
-		break;
-	}
-	return 0;
-}
diff --git a/arch/arm/cpu/armv7/stv0991/reset.c b/arch/arm/cpu/armv7/stv0991/reset.c
deleted file mode 100644
index 77d4477c8dc..00000000000
--- a/arch/arm/cpu/armv7/stv0991/reset.c
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <[email protected]> for STMicroelectronics.
- */
-
-#include <common.h>
-#include <cpu_func.h>
-#include <asm/io.h>
-#include <asm/arch/stv0991_wdru.h>
-#include <linux/delay.h>
-void reset_cpu(void)
-{
-	puts("System is going to reboot ...\n");
-	/*
-	 * This 1 second delay will allow the above message
-	 * to be printed before reset
-	 */
-	udelay((1000 * 1000));
-
-	/* Setting bit 1 of the WDRU unit will reset the SoC */
-	writel(WDRU_RST_SYS, &stv0991_wd_ru_ptr->wdru_ctrl1);
-
-	/* system will restart */
-	while (1)
-		;
-}
diff --git a/arch/arm/cpu/armv7/stv0991/timer.c b/arch/arm/cpu/armv7/stv0991/timer.c
deleted file mode 100644
index f7cc45772f9..00000000000
--- a/arch/arm/cpu/armv7/stv0991/timer.c
+++ /dev/null
@@ -1,114 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <[email protected]> for STMicroelectronics.
- */
-
-#include <common.h>
-#include <init.h>
-#include <time.h>
-#include <asm/global_data.h>
-#include <asm/io.h>
-#include <asm/arch-stv0991/hardware.h>
-#include <asm/arch-stv0991/stv0991_cgu.h>
-#include <asm/arch-stv0991/stv0991_gpt.h>
-#include <linux/delay.h>
-
-static struct stv0991_cgu_regs *const stv0991_cgu_regs = \
-				(struct stv0991_cgu_regs *) (CGU_BASE_ADDR);
-
-#define READ_TIMER()	(readl(&gpt1_regs_ptr->cnt) & GPT_FREE_RUNNING)
-#define GPT_RESOLUTION	(CFG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define timestamp gd->arch.tbl
-#define lastdec gd->arch.lastinc
-
-static ulong get_timer_masked(void);
-
-int timer_init(void)
-{
-	/* Timer1 clock configuration */
-	writel(TIMER1_CLK_CFG, &stv0991_cgu_regs->tim_freq);
-	writel(readl(&stv0991_cgu_regs->cgu_enable_2) |
-			TIMER1_CLK_EN, &stv0991_cgu_regs->cgu_enable_2);
-
-	/* Stop the timer */
-	writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1);
-	writel(GPT_PRESCALER_128, &gpt1_regs_ptr->psc);
-	/* Configure timer for auto-reload */
-	writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD,
-			&gpt1_regs_ptr->cr1);
-
-	/* load value for free running */
-	writel(GPT_FREE_RUNNING, &gpt1_regs_ptr->arr);
-
-	/* start timer */
-	writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN,
-			&gpt1_regs_ptr->cr1);
-
-	/* Reset the timer */
-	lastdec = READ_TIMER();
-	timestamp = 0;
-
-	return 0;
-}
-
-/*
- * timer without interrupts
- */
-ulong get_timer(ulong base)
-{
-	return (get_timer_masked() / GPT_RESOLUTION) - base;
-}
-
-void __udelay(unsigned long usec)
-{
-	ulong tmo;
-	ulong start = get_timer_masked();
-	ulong tenudelcnt = CFG_SYS_HZ_CLOCK / (1000 * 100);
-	ulong rndoff;
-
-	rndoff = (usec % 10) ? 1 : 0;
-
-	/* tenudelcnt timer tick gives 10 microsecconds delay */
-	tmo = ((usec / 10) + rndoff) * tenudelcnt;
-
-	while ((ulong) (get_timer_masked() - start) < tmo)
-		;
-}
-
-static ulong get_timer_masked(void)
-{
-	ulong now = READ_TIMER();
-
-	if (now >= lastdec) {
-		/* normal mode */
-		timestamp += now - lastdec;
-	} else {
-		/* we have an overflow ... */
-		timestamp += now + GPT_FREE_RUNNING - lastdec;
-	}
-	lastdec = now;
-
-	return timestamp;
-}
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
-	return get_timer(0);
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
-	return CONFIG_SYS_HZ;
-}