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authorMikhail Kalashnikov <[email protected]>2023-11-11 12:10:00 +0300
committerAndre Przywara <[email protected]>2023-11-12 18:04:32 +0000
commit4b02f0120a4bb2a5d7081aef8cef6a4ca57e9db2 (patch)
treef7c5cfc88b43a7597d7be30d7651322d65ae0be2 /arch/arm/include
parentb71129ca3b469ccb22182c34d8cc05a742795582 (diff)
sunxi: H616: add LPDDR4 DRAM support
The H616 SoC family has support for several types of DRAM: DDR3, LPDDR3, DDR4 and LPDDR4. At the moment, the driver only supports DDR3 and LPDDR3 memory. Let's extend the driver to support the LPDDR4 memory. This type of memory widely used in device with T507(-H) SoC and new orangepi zero3 with H618. The compatibility with T507 is not yet complete, because there is difference in the phy_init array. The LPDDR4-2133 timings correspond to DRAM Rayson RS1G32LO4D2BDS-53BT found on the NOR SPI from the Orangepi Zero 3 4GB. Signed-off-by: Mikhail Kalashnikov <[email protected]> Tested-by: Piotr Oniszczuk <[email protected]> Reviewed-by: Jernej Skrabec <[email protected]> Acked-by: Andre Przywara <[email protected]>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h
index 11774deded0..a8fdda124a0 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h
@@ -130,6 +130,7 @@ check_member(sunxi_mctl_ctl_reg, unk_0x4240, 0x4240);
#define MSTR_DEVICETYPE_LPDDR2 BIT(2)
#define MSTR_DEVICETYPE_LPDDR3 BIT(3)
#define MSTR_DEVICETYPE_DDR4 BIT(4)
+#define MSTR_DEVICETYPE_LPDDR4 BIT(5)
#define MSTR_DEVICETYPE_MASK GENMASK(5, 0)
#define MSTR_2TMODE BIT(10)
#define MSTR_BUSWIDTH_FULL (0 << 12)
@@ -154,6 +155,7 @@ struct dram_para {
u32 odt_en;
u32 tpr0;
u32 tpr2;
+ u32 tpr6;
u32 tpr10;
u32 tpr11;
u32 tpr12;