diff options
| author | Philipp Tomsich <[email protected]> | 2017-10-10 16:21:10 +0200 |
|---|---|---|
| committer | Philipp Tomsich <[email protected]> | 2017-11-21 23:57:22 +0100 |
| commit | b377d22264178122e72c18c4d5d5ab2d4585cfdb (patch) | |
| tree | f6ca0733b87999fcfc983721ce4390b61a097ecc /arch/arm/include | |
| parent | 16d761e3dd8911760bb87d7c983cdea79d8540e3 (diff) | |
rockchip: boot0 hook: support early return for RK3188/RK3066-style BROM
Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 1KB data
from NAND into SRAM and executes it. Then, following a return to bootrom, the
BROM loads additional code to SRAM (not overwriting the first block read) and
reenters at the same address as the first time.
To support booting either a TPL (on the RK3066) or SPL (on the RK3188) using
this model of having to count entries, this commit adds code to the boot0
hook to track the number of entries and handle them accordingly.
Signed-off-by: Philipp Tomsich <[email protected]>
Signed-off-by: Paweł Jarosz <[email protected]>
Tested-by: Andy Yan <[email protected]>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-rockchip/boot0.h | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h index f7c614669cf..af3a733e984 100644 --- a/arch/arm/include/asm/arch-rockchip/boot0.h +++ b/arch/arm/include/asm/arch-rockchip/boot0.h @@ -19,12 +19,25 @@ * beginning of the executable. However, as we want to keep * this generic and make it applicable to builds that are like * the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no - * TPL, but extra space needed in the SPL), we simply repeat - * the 'b reset' with the expectation that the first one will - * be overwritten, if this is the first stage contained in the - * final image created with mkimage)... + * TPL, but extra space needed in the SPL), we simply insert + * a branch-to-next-instruction-word with the expectation that + * the first one may be overwritten, if this is the first stage + * contained in the final image created with mkimage)... */ - b reset /* may be overwritten --- should be 'nop' or a 'b reset' */ + b 1f /* if overwritten, entry-address is at the next word */ +1: +#endif +#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM) + adr r3, entry_counter + ldr r0, [r3] + cmp r0, #1 /* check if entry_counter == 1 */ + beq reset /* regular bootup */ + add r0, #1 + str r0, [r3] /* increment the entry_counter in memory */ + mov r0, #0 /* return 0 to the BROM to signal 'OK' */ + bx lr /* return control to the BROM */ +entry_counter: + .word 0 #endif b reset #if !defined(CONFIG_ARM64) @@ -32,7 +45,7 @@ * For armv7, the addr '_start' will used as vector start address * and write to VBAR register, which needs to aligned to 0x20. */ - .align(5) + .align(5), 0x0 _start: ARM_VECTORS #endif |