diff options
| author | Bastian Ruppert <[email protected]> | 2011-10-04 23:43:29 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <[email protected]> | 2011-11-03 22:56:25 +0100 |
| commit | ca1646b85d5d2be0ab524190875e6208f61ae8c6 (patch) | |
| tree | 5051f1d3efed119754117a7a7c62fb4d456f2f90 /arch/arm/include | |
| parent | f9fc237f1f07d4e5ff7c9c2da39cabc8d3d7b339 (diff) | |
Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console
Signed-off-by: Bastian Ruppert <[email protected]>
Signed-off-by: Stefano Babic <[email protected]>
CC: [email protected]
CC: Sandeep Paulraj <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-davinci/hardware.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index 946c793ab57..8c2808c9d76 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -176,6 +176,10 @@ typedef volatile unsigned int * dv_reg_p; #define GPIO_BANK2_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x3c) #define GPIO_BANK2_REG_SET_ADDR (DAVINCI_GPIO_BASE + 0x40) #define GPIO_BANK2_REG_CLR_ADDR (DAVINCI_GPIO_BASE + 0x44) +#define GPIO_BANK6_REG_DIR_ADDR (DAVINCI_GPIO_BASE + 0x88) +#define GPIO_BANK6_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x8c) +#define GPIO_BANK6_REG_SET_ADDR (DAVINCI_GPIO_BASE + 0x90) +#define GPIO_BANK6_REG_CLR_ADDR (DAVINCI_GPIO_BASE + 0x94) #endif /* CONFIG_SOC_DA8XX */ /* Power and Sleep Controller (PSC) Domains */ |