diff options
| author | Ramon Fried <[email protected]> | 2018-05-16 12:13:39 +0300 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2018-05-26 18:19:11 -0400 |
| commit | 640dc349422d1f228ef8d2bb35cd89b1663273f1 (patch) | |
| tree | f195699e78d77164749bc509e47101e49072ea79 /arch/arm/mach-snapdragon/include | |
| parent | 7e5ad796bcd65772a87da236ae21cd536ae3a4d2 (diff) | |
mach-snapdragon: Fix UART clock flow
UART clock enabling flow was wrong.
Changed the flow according to downstream implementation in LK.
Signed-off-by: Ramon Fried <[email protected]>
Diffstat (limited to 'arch/arm/mach-snapdragon/include')
| -rw-r--r-- | arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h b/arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h index ae784387fa1..520e2e6bd7c 100644 --- a/arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h +++ b/arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h @@ -13,6 +13,7 @@ /* Clocks: (from CLK_CTL_BASE) */ #define GPLL0_STATUS (0x2101C) #define APCS_GPLL_ENA_VOTE (0x45000) +#define APCS_CLOCK_BRANCH_ENA_VOTE (0x45004) #define SDCC_BCR(n) ((n * 0x1000) + 0x41000) #define SDCC_CMD_RCGR(n) ((n * 0x1000) + 0x41004) |